Parallel Merge Sort is an optimized sorting algorithm that leverages parallel processing to enhance the performance of the traditional merge sort. This project implements a parallel version of the merge sort algorithm using Python, allowing for efficient sorting of large datasets.

Stoic-V: a deterministic RV32IM + Zba/Zbb/Zbs + Zicsr (M-mode) RISC-V soft core in SystemVerilog. No caches, speculation, or branch prediction, so timing is operand-independent and WCET is statically analysable. Drop-in replacement for the AMD MicroBlaze-V via the LMB v10 interface; closes 250 MHz on UltraScale+.

Basic CLI tool for switching Linux CPU governors per core or system-wide.

componentes de uma CPU de 16 bits

This is where I am putting first RISC-V RV32I single-cycle processor (in development)