SemiIntel — Semiconductor Test Intelligence Platform

A portfolio-grade engineering analytics platform for semiconductor test data analysis. Built as a serious internal tooling prototype for yield engineers, product engineers, and test engineers.

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Overview

SemiIntel ingests synthetic semiconductor test data, normalizes it into a structured engineering model, computes yield KPIs, visualizes wafer-level behavior, detects anomalies, and generates interactive engineering reports — all in the browser with no backend required.

This is not a generic dashboard. It models realistic semiconductor manufacturing patterns: edge failures, radial gradients, ring defects, quadrant kills, lot-to-lot drift, and bimodal parametric distributions.

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Features

Data Engine

• Synthetic dataset generator using Box-Muller Gaussian sampling
• Lot-level and wafer-level process shift simulation
• 4 injected anomaly patterns: ring_defect, quadrant_kill, lot_drift, edge_effect
• CSV upload with automatic schema detection

Analytics

• Yield by lot and wafer
• Fail pareto by bin
• Parametric summary statistics (mean, sigma, P5–P95, Cpk)
• Wafer spatial clustering score
• Top failing tests

Visualizations

• Wafermap — Canvas-based die grid with bin coloring and die-level tooltips
• Yield by Lot — Bar chart with min/max error bands
• Yield Trend — Wafer-index trend line per lot
• Fail Pareto — Dual-axis bar + cumulative line
• Parametric Histogram — With LSL/USL spec limits overlaid
• Lot × Wafer Heatmap — Yield or parameter mean across full dataset
• Box Plot — Parameter distribution comparison across lots
• Anomaly Scatter — Yield vs. anomaly score per wafer

Anomaly Detection

• Z-score outlier detection (configurable threshold)
• IQR-based outlier detection
• Wafer-level anomaly scoring: weighted combination of yield deviation, spatial clustering, and parametric extremes
• Anomaly flags: low_yield, spatial_pattern, param_outlier, ring_defect, quadrant_kill

Engineering Report

• Yield summary table per lot
• Process capability (Cpk) table for all 8 parameters
• Top anomalous wafers ranked by score
• Rule-based recommendations (centering, defect investigation, spatial pattern alerts)
• Print / PDF export via browser

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Parameters Modeled

Parameter	Unit	Description
Vth_n	V	NMOS threshold voltage
Vth_p	V	PMOS threshold voltage
Idsat_n	mA/μm	NMOS drive current
Idsat_p	mA/μm	PMOS drive current
Ioff	nA/μm	Off-state leakage current
Vdd_min	V	Minimum operating voltage
Ring_Freq	GHz	Ring oscillator frequency
Leakage	μA	Total leakage current

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Bin Definitions

Bin	Label	Description
1	Pass	All specs met
2	Vth_Fail	Threshold voltage out of spec
3	Idsat_Fail	Drive current out of spec
4	Leakage_Fail	Leakage current too high
5	Multi_Fail	Multiple parametric failures
6	Structural	Hard structural failure

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Tech Stack

• Vanilla JS (ES6 modules, no build step)
• Plotly.js (charts and heatmaps)
• HTML5 Canvas (wafermap rendering)
• No backend, no database, no framework

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Running Locally

# Any static file server works — ES modules require HTTP, not file://
python -m http.server 4242

# or
npx serve .

Then open http://localhost:4242 in your browser.

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Project Structure

semiconductor-platform/
├── index.html
├── css/
│   ├── reset.css
│   ├── theme.css
│   ├── layout.css
│   └── components.css
└── js/
    ├── config.js       # Parameters, bins, thresholds
    ├── store.js        # AppState singleton + event bus
    ├── generator.js    # Synthetic data engine
    ├── analytics.js    # Pure analytics functions
    ├── anomaly.js      # Outlier detection + wafer scoring
    ├── wafermap.js     # Canvas wafermap renderer
    ├── charts.js       # Plotly chart wrappers
    ├── ingest.js       # CSV parser + data loader
    ├── report.js       # Engineering report generator
    ├── ui.js           # DOM management
    └── main.js         # App entry point