Legalize v32i1 and make use of pext in haswell

[laishzh]

Goal

I am working on legalizing type v32i1, and transforming vector_shuffle into pext operation in some specific masks.

How

1. Legalize the type by addRegisterClass and edit file x86RegisterInfo.td to associate the type with proper register.
2. SetOperationAction to overwrite the default action of specific Operation with the type, like
   setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v32i1, Custom);
   If you want to use the Custom action, you need to check whether the LowerOperation function can support for the operation.
3. Modified like the function LowerVECTOR_SHUFFLE to generate new node for the specific masks.
   In some cases, need to change the assertions.

Others

I just write a VR32 for v32i1 instead of using GR32 directly, so that the def : Pat <(i32 (bitconvert (v32i1 VR32:$src))), (i32 VR32:$src)>; can be compiled successfully.

[chouqin]

How do we test this code? @laishzh

[laishzh]

We can follow llvm's testing guide, using the Regression Tests. In your project, you have renamed the llc to llc-3.4, so one error will occur when you
make check. Just ln -s llc-3.4 llc in the bindirectory. @chouqin

[chouqin]

I mean, how can we know that the code you changed have taken effect? Can we just write some simple LLVM IR to test it?

[chouqin]

What is the default operation type for a type, Legal, Expand, or Custom?

What if this line is not added?