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RTL-to-GDSII-Booth-Multiplier
RTL-to-GDSII-Booth-Multiplier PublicRTL to GDSII of Radix-4 Booth Multiplier using Cadence Genus and Innovus - full ASIC design flow
Verilog
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NPTEL-CERTIFICATIONS
NPTEL-CERTIFICATIONS PublicNPTEL certifications across VLSI, Computer Architecture, Programming, Mathematics and emerging tech
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Certificates
Certificates PublicCourse certifications, internship completion certificates and language proficiency achievements
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my-codeworks-HDLBits
my-codeworks-HDLBits PublicPersonal solutions to HDLBits digital logic exercises - combinational, sequential, FSM and arithmetic in Verilog
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MIPS32-SINGLE-CYCLE-CPU-FOR-FPGA
MIPS32-SINGLE-CYCLE-CPU-FOR-FPGA Public32-bit single-cycle MIPS processor in Verilog HDL, synthesizable on Xilinx FPGA
Verilog
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