Parasitic extraction format converters for FasterCap and other field solvers
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Aug 27, 2026 - Python
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parasitic-extraction
Here are 6 public repositories matching this topic...
Designed and implemented a performance-balanced noise-canceling LNA in SCL 180nm CMOS using Cadence Virtuoso, covering CG-CS, Cascode, and Folded-Cascode architectures, RF analysis, full-custom layout, DRC/LVS, PEX, and a custom spiral inductor.
calibre cadence-virtuoso mixed-signal rf-analysis linearity noise-cancellation stability-analysis low-noise-amplifier lna noise-analysis cadence-spectre s-parameter design-rule-check design-for-manufacturability scl180nm full-custom-layout parasitic-extraction layout-vs-schematic custom-spiral-inductor
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Apr 14, 2026
First-principles EM field simulation for analog and digital circuits. Quasi-static + drift-diffusion + electro-thermal + SPICE on one Yee grid, with exact field-circuit coupling. Every assumption documented and measured.
python simulation numpy fdtd eda spice scientific-computing computational-physics scipy electromagnetics circuit-simulation drift-diffusion semiconductor tcad yee-grid quasistatic signal-integrity electrothermal parasitic-extraction finite-integration-technique
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Aug 6, 2026 - Python
Hands-on Analog Layout Internship/Training at Semionics using Cadence Virtuoso and GlobalFoundries 40nm, covering custom analog, mixed-signal, and CMOS circuit layout.
layout calibre cadence-virtuoso digital-design custom-layout cmos-circuits analog-layout layout-design standard-cells custom-analog mixed-signals-design globalfoundries design-rule-check design-for-manufacturability parasitic-extraction layout-vs-schematic gf40nm
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Aug 19, 2026
Does your coupling extractor predict physics that cannot exist? Detects anti-screening (k>1), which no passive arrangement of conductors can produce.
python cli machine-learning physics linter verification eda computational-physics screening electromagnetics coupling capacitance parasitic-extraction
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Sep 4, 2026 - Python
RC parasitic extraction — routed layout to SPEF; a calibrated sky130 deck tracks OpenRCX.
rust asic digital analog eda semiconductor mixed-signal silicon opendb spef physical-design openroad open-source-silicon eda-tools rc-extraction vyges open-silicon vyges-loom parasitic-extraction
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Sep 3, 2026 - Rust
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