Carleton University / ELEC4609 Integrated Circuit Design and Fabrication / Project: Static Logic PRSG (Pseudo Random Sequence Generator) chip design, fabrication and testing.
-
Updated
Aug 6, 2024
Carleton University / ELEC4609 Integrated Circuit Design and Fabrication / Project: Static Logic PRSG (Pseudo Random Sequence Generator) chip design, fabrication and testing.
一款用于芯片测试数据判断及良率分析的C++和Python开发工具。
Engineering notes on chip test automation, JTAG vector generation, VCD-to-WGL conversion, and verification infrastructure.
To associate your repository with the chip-testing topic, visit your repo's landing page and select "manage topics."