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libunwind changes needed to run code in sgx environment via rust-sgx. - #63

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libunwind changes needed to run code in sgx environment via rust-sgx.#63
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Updated branch in response to: #57 (comment)

Please advise on process as this is the first PR against rust-lang's llvm and I tried to follow instructions as close as possible..

Ticket: fortanix/rust-sgx#174

Description: libunwind changes needed to run code in sgx environment via rust-sgx.

Target that uses this in rust: x86_64-fortanix-unknown-sgx.
Rust-lang PR depends on this - plan is to raise it if this PR is accepted.

Without this change, rust std for this toolchain is forced to use a precompiled library loaded via environment variable.

Code is guarded via defines to enable only if 'RUST_SGX' is present.

Main logic is in libunwind/src/AddressSpace.hpp

We use 6 symbols to figure out where eh_frame / eh_frame_hdr is at runtime when loaded in an SGX enclave. (EH symbols + IMAGE base)
These are set when elf is converged to sgx format by 'fortanix-sgx-tools'.

Original ported changes: llvm/llvm-project@release/5.x...fortanix:release/5.x

Code is guarded via defines to enable only if 'RUST_SGX' is present.

Main logic is in libunwind/src/AddressSpace.hpp
We use 6 symbols to figure out where eh_frame / eh_frame_hdr is at runtime when loaded in an SGX enclave. (EH symbols + IMAGE base)
These are set by 'fortanix-sgx-tools'.

As notes:
- Target above at the moment uses a pre-compiled libunwind.a from forked repo.
- Goal of these changes is to use official llvm with patch.
- Changes in rust-lang to use this are planned if/when this is accepted.
- Ticket: fortanix/rust-sgx#174
- Original ported changes: llvm/llvm-project@release/5.x...fortanix:release/5.x
@AdrianCX AdrianCX closed this May 26, 2020
vext01 added a commit to vext01/llvm-project that referenced this pull request Apr 27, 2023
63: Kill some dead code in the control point pass. r=ltratt a=vext01



Co-authored-by: Edd Barrett <vext01@gmail.com>
nikic pushed a commit to nikic/llvm-project that referenced this pull request Jul 24, 2026
…SHL (llvm#207628)

`select(icmp ult(amt, EltSize), shl(x, amt), 0)`, where EltSize is the
{8, 16, 32, 64} lane size, is the usual way to guard a variable vector
shift against shl poison. On AArch64 the guard is unnecessary because
USHL already returns zero once the shift amount reaches the lane size.

For v4i32:

Before:
```
	movi	v2.4s, rust-lang#63
	movi	v3.4s, rust-lang#32
	and	v1.16b, v1.16b, v2.16b
	ushl	v0.4s, v0.4s, v1.4s
	cmhi	v1.4s, v3.4s, v1.4s
	and	v0.16b, v1.16b, v0.16b
```
After:
```
	movi	v2.4s, rust-lang#63
	and	v1.16b, v1.16b, v2.16b
	ushl	v0.4s, v0.4s, v1.4s
```

USHL reads each lane's shift amount as a signed value from its low byte
so amounts above 127 would be misread. The fold applies directly when
known bits can prove the amounts are at most 127 and otherwise the
amounts are clamped to EltSize with umin first, which is still one
instruction cheaper than the select.

NEON has no umin for 64-bit lanes so unbounded v2i64 amounts use the SVE
umin when available and otherwise keep the select.

lshr gets the same fold since it already lowers to ushl with a negated
amount.

This is the AArch64 counterpart of llvm#86922, which added the same folds
for AVX2's variable shifts. This does the select(shift) half; the
shift(select) form will be a follow-up.

Closes llvm#200698.
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