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BUFIO is not packed, the BUFR divide ladder is unreachable, and the HCLK_L enables are never emitted

Status: Open.

#149 In openXC7/nextpnr-xilinx;

· gHashTag opened on Aug 14, 2026

xc7: BUFR_DIVIDE is silently dropped - only the bypass path through BUFR is modelled

Status: Open.

#147 In openXC7/nextpnr-xilinx;

· gHashTag opened on Aug 13, 2026

ISERDESE2 with D from a pad is unroutable on xc7: no DINV pass-through is created

Status: Open.

#143 In openXC7/nextpnr-xilinx;

· gHashTag opened on Aug 12, 2026

RAM128X1D/RAM256X1D address cells unplaceable in LiteX L2 tag memory (litex-ddr-arty-s7-deephier)

Status: Open.

#141 In openXC7/nextpnr-xilinx;

· gHashTag opened on Aug 12, 2026

xc7: IDDR does not capture at all on silicon — both outputs inert in every edge mode (RGMII receive is dead)

Status: Open.

#114 In openXC7/nextpnr-xilinx;

· gHashTag opened on Aug 8, 2026

GTPE2_CHANNEL: 80 FASM attribute defaults differ from the Xilinx library

Status: Open.

#101 In openXC7/nextpnr-xilinx;

· AnesVrce opened on Jul 31, 2026

IBUFDS_GTE2.O driving both a GT and a BUFG gives a dead fabric clock

Status: Open.

#100 In openXC7/nextpnr-xilinx;

· AnesVrce opened on Jul 31, 2026

Regression since 45a986b: CARRY4 output to FF mux fails to route

Status: Open.

#97 In openXC7/nextpnr-xilinx;

· AnesVrce opened on Jul 31, 2026

openXC7 DDR3/SSTL15 flow gaps on XC7K480T: INTERNAL_VREF silently ignored (xdc.cc) + LIOI3_TBYTESRC pseudo-pip aborts fasm2frames

Status: Open.

#92 In openXC7/nextpnr-xilinx;

· haomjc opened on Jul 1, 2026

very slow maximum clock frequencies achieved

Status: Open.

#91 In openXC7/nextpnr-xilinx;

· juanschroeder opened on Jun 7, 2026

missing file prjxray-db/zynq7/xc7z035/tilegrid.json

Status: Open.

#87 In openXC7/nextpnr-xilinx;

· phanirithvij opened on Mar 29, 2026

MMCME2_ADV does not lock, output clock erratic

Status: Open.

#79 In openXC7/nextpnr-xilinx;

· 0xa000 opened on Feb 2, 2026