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MOS Differential and Power Amplifier Design in LTspice

Simulator Domain Devices Status

Two-stage course project covering the design of MOS differential amplifiers and a feedback-stabilized MOS/BJT power amplifier. The repository preserves the editable LTspice schematics, reports, and curated figures while excluding reproducible simulator output files.

Important

All numerical values are schematic-level simulation results. Process corners, mismatch/Monte Carlo analysis, PCB parasitics, fabricated hardware, and laboratory measurements are not included.

Project stages

Phase 1 — Differential amplifier

  • NMOS differential pair with a resistive load
  • PMOS active-load replacement
  • Current-mirror biasing
  • Gain, CMRR, output resistance, power, and source-degeneration trade-offs

The four incremental designs are stored in Part1/ through Part4/.

Phase 2 — Power amplifier

  • High-gain MOS differential input stage
  • Complementary BJT Class-B output stage
  • Negative feedback for closed-loop gain control and crossover-distortion reduction
  • Output-swing, ICMR, THD, and quiescent-power analysis while driving a $100,\Omega$ load

Reported simulation results

Metric Reported result
Closed-loop gain approximately 2 V/V
Output swing approximately 16.5 V p-p
THD near maximum reported swing approximately 0.04%
Quiescent power approximately 54 mW
Load $100,\Omega$

Repository structure

.
├── Part1/ ... Part4/                  # Phase-1 LTspice schematics and figures
├── Phase2/
│   ├── Sim/Pre/                       # Preliminary power-stage studies
│   ├── Sim/Design/                    # Final integrated design
│   ├── Sim/output/                    # Output-stage study
│   ├── Fig/                           # Report figures
│   └── ElectronicsII_Project_Phase2.pdf
├── ElectronicsII_Project_Phase1.pdf
└── README.md

Reproduce the simulations

  1. Install LTspice.
  2. Clone this repository.
  3. Open the desired .asc file from Part1/Part4/ or Phase2/Sim/.
  4. Run the configured operating-point, transient, AC, or FFT analysis.

The transistor models required by the designs are embedded in the schematic directives. LTspice regenerates .raw, .log, and .fft files locally; they are intentionally excluded from version control.

Course context

  • Course: Electronics II
  • Institution: Sharif University of Technology
  • Author: Moein Yousefinia
  • Term: Spring 2025

No open-source license is granted by this repository unless a license file is added explicitly.

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Complete Design and Simulation of a Power Amplifier based on MOSFET and BJT

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