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MESA-2026.06

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@HoratiuVultur HoratiuVultur released this 02 Jul 10:25
v2026.06
b7fbf51 
Version:          MESA-2026.06
Previous Version: MESA-2026.03
Date:             2026-07-02
Description:      Roadmap release

Note

This is the first release that contains both the MESA and MEPA API:

MESA

LAN9662 mux mode 4

Support for port mux mode 4 has been added for LAN9662.

BUM policers

Support for mapping ingress flows to BUM policers with associated counters has been added.
The general BUM policer properties are controlled using the mesa_bum_conf_t struct.
Each policer consists on three buckets controlled using the mesa_bum_policer_conf_t struct.
Counters per policer are available in the mesa_bum_policer_counters_t struct.
SKUs: VSC741X, VSC743X, VSC744X, VSC746X, VSC754X, VSC755X and LAN969X.

SerDes TX/RX polarity

Support for configuring the RX and TX polarity.

SerDes PRBS error injection

Pules the SerDes BIST error-inection bit so errors are inserted into the
outgoing PRBS stream.

SGPIO configuration

Extend the SGPIO configuration to configure the clock frequency.

SPI access

Extend the API to allow SPI access. Currently this is used to access the PHYs.

MESA-DOC: Example added

A Simple ACL example has been added in MESA-DOC.

MEPA

VSC8254/56/57/58: SFP coverage

Full VSC8254/56/57/58 SFP coverage in repeater + non-repeater mode:

Repeater mode: 1000BASE-X optical, 100BASE-FX optical, DAC/twinax, 1G
CuSFP, and 10/100M CuSFP all link and pass traffic.
Non-repeater (1G_MODE SGMII): 1G CuSFP keeps the VSC8254/56/57/58
Line/Host MAC, MACsec and 1588 blocks engaged in the datapath.
Mode is selected by the application via meba_phy_conf_set with
conf_10g.oper_mode = MEPA_PHY_LAN_MODE | MEPA_PHY_1G_MODE | MEPA_PHY_REPEATER_MODE.

VSC8254/56/57/58: Support for SGMII

Added vtss_phy_10g_sgmii_status_get() -- reads
LINE_PCS1G.PCS1G_ANEG_STATUS2.LP_ADV_ABILITY per Cisco-SGMII bit layout (link
bit 15, fdx bit 12, speed bits 11:10) and returns link / fdx / speed in a new
vtss_phy_10g_sgmii_status_t. Use this on SGMII-configured ports instead of
vtss_phy_10g_clause_37_status_get() whose 1000BASE-X bit layout differs.

The 10G poll callback (phy_10g_poll) now decodes the SGMII partner page on
every poll, re-runs vtss_phy_10g_sgmii_mode_set() on partner-speed change,
and reports the resolved partner state through the standard mepa_status_t
-- no application-side change required beyond calling mepa_poll().

1G Copper SFP (CuSFP) support on VSC8254/56/57/58: the module's internal PHY can
be reconfigured into SGMII over I2C, letting the CuSFP run in non-repeater
VTSS_PHY_1G_MODE with the Line/Host MAC, MACsec and 1588 blocks in the
datapath.

VSC8254/56/57/58: Map 1G PCS link-down / out-of-sync interrupts to GPIO

VSC8254/56/57/58 legacy PHY interrupt handling: 1G PCS link-down
/ out-of-sync events can now generate a hardware interrupt on a GPIO,
enabled via vtss_phy_10g_extended2_event_enable_set() together with
vtss_phy_10g_gpio_mode_set(). Added vtss_phy_10g_gpio_aggr_table_get() /
vtss_phy_10g_gpio_aggr_table_set() to configure the per-aggregator
channel-to-GPIO interrupt routing table.

LAN80XX: Allow to configure multiple PTP clock source

Extend LAN80XX to support external clock as PTP LTC Clock source. Now it
possible to configure a 25MHz, 50MHz or 125MHz as clock source.

VSC8254/56/57/58: Fix for lower speeds (10/100/1000)

VSC8254/56/57/58 repeater mode now passes traffic at 10/100/1000
Mbps. The driver sets the SerDes rate to 1.25 Gbps (VTSS_RPTR_RATE_1_25) for
1G-class SFPs in repeater mode; previously the SerDes stayed at the default
10.3125 Gbps and could not link to a sub-10G partner.

VSC8254/56/57/58: Detect bus I2C busy

Fixed VSC8253/56/57/58 10G I2C bus-busy detection -- the read path truncated the
status u16 to u8 before checking bit 15, so the busy bit was never observed
and callers could receive byte 0 of an in-flight transaction.

VSC8254/56/57/58: Allow to have multi-byte SFP EEPROM access

VSC8254/56/57/58 mepa_i2c_read() / mepa_i2c_write() wrappers now honour
i2c_dev_addr and cnt -- previously both fields were ignored, collapsing
every call to a single-byte access against the last-configured slave id.
Multi-byte SFP EEPROM accesses now work.

LAN80XX: Fix MACSec pipeline

Fix for MACsec Pipeline clear failure when SecY deleted during like traffic

LAN80XXX: Fix PTP latency configuration

It was not working to set the ingress latency and it was not possible to set
negative latency values or larger latency offsets

Known limitations

VSC8254/56/57/58 non-repeater mode at 10/100M: Rev D silicon has no
byte-decimation circuit for SGMII byte-repeated frames, so sub-1G partners
cannot be carried in VTSS_PHY_1G_MODE. The driver detects this case and forces
link-down. Use repeater mode for 10/100M CuSFP partners.

BSP and Toolchains

http://mscc-ent-open-source.s3-website-eu-west-1.amazonaws.com/?prefix=public_root/
http://mscc-ent-open-source.s3-eu-west-1.amazonaws.com/public_root/toolchain/mchp-toolchain-bin-2025.02-010.tar.gz
http://mscc-ent-open-source.s3-eu-west-1.amazonaws.com/public_root/toolchain/mchp-toolchain-source-2025.02-010.tar.gz
http://mscc-ent-open-source.s3-eu-west-1.amazonaws.com/public_root/bsp/mchp-brsdk-arm-2026.06.tar.gz
http://mscc-ent-open-source.s3-eu-west-1.amazonaws.com/public_root/bsp/mchp-brsdk-arm64-2026.06.tar.gz
http://mscc-ent-open-source.s3-eu-west-1.amazonaws.com/public_root/bsp/mchp-brsdk-mipsel-2026.06.tar.gz
http://mscc-ent-open-source.s3-eu-west-1.amazonaws.com/public_root/bsp/mchp-brsdk-source-2026.06.tar.gz
https://microchip-ung.github.io/bsp-doc/bsp/2026.06/index.html

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MESA-2026.03

MESA-2026.03

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@allannielsen allannielsen released this 26 Mar 09:27
v2026.03
25e97aa 
Version:          MESA-2026.03
Previous Version: MESA-2025.12
Date:             2026-03-26
Description:      Roadmap release

New features

Outer tag filtering

Advanced outer tag filtering has been added, using the
mesa_vlan_port_conf_t::outer_tag_discard field.

ACL MEG level filtering

ACL MEG level filtering has been added, using the mesa_ace_frame_etype_t::mel
field.

CPU queue port and priority redirect

Options for redirecting frames classified to a CPU queue to a specific port and
priority have been added to the mesa_packet_rx_queue_npi_conf_t struct.

Serdes PRBS test pattern APIs

New APIs: mesa_port_serdes_prbs_conf_set and
mesa_port_serdes_prbs_status_get have been added to facilitate SerDes tuning.
Look for the SERDES_PRBS_TEST capability to see supported chips.

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MESA-2025.12-1

MESA-2025.12-1

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@allannielsen allannielsen released this 16 Jan 10:18
v2025.12-1
de9093a 
Version:          MESA-2025.12-1
Previous Version: MESA-2025.12
Date:             2026-01-16
Description:      Bugfix release

SparX5/SparX5i: Fix time-stamping compensation values

An issue has been fixed with regards to the time-stamping compensation values.

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MESA-2025.12

MESA-2025.12

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@allannielsen allannielsen released this 18 Dec 11:14
v2025.12
e36e91a 
Version:          MESA-2025.12
Previous Version: MESA-2025.09
Date:             2025-12-18
Description:      Roadmap release

Port IFH control

SparX-5/LAN969x/Luton26: The use of IFH can now be controlled using mesa_port_ifh_conf_set().

The use of prefix can also be controlled for each direction.

Extended ACL key for LLC frames

SparX-5/LAN969x: ACL/HACL rules now support extended filtering for LLC frames.
The addition of the llc_ext field in the mesa_ace_frame_llc_t and mesa_hace_frame_llc_t
structures allows for matching byte 4-7 after the Ethernet Type/Length field.

Jaguar-2/Serval-T: ACL rules now allow matching of LLC frame byte 4-7.

Ocelot/LAN966x: ACL rules now allow matching of LLC frame byte 4.

VCL/ACL support for MATCH_ID

SparX-5/LAN969x/Jaguar-2/Serval-T: VCL/ACL rules can now be used to control the MATCH_ID
field in the frame extraction header (IFH). This is done using the match_id / match_mask fields
in the mesa_vce_action_t, mesa_acl_action_t and mesa_hacl_action_t structures.
The MATCH ID is also decoded in the mesa_packet_rx_info_t structure.

Notice that MATCH ID bit 0 and 1 were already used by other ACL actions. To allow control of all
16 bits, the ifh_flag must be set to false and acl_hit_disable must be set to true for all ACL actions.

Extended TCL keys and actions

SparX-5/LAN969x: TCL rules can now match on both vid and flow_id in the mesa_tce_key_t structure.
Other platforms can still only match on either vid or flow_id for a given rule.

SparX-5/LAN969x: TCL rules can now match OAM frames and MEG levels. This is done using the oam and
mel fields in the mesa_tce_key_t structure. Notice that matching also requires OAM frames to be detected
using VCL rules, via the oam_detect field in the mesa_vce_action_t structure.

SparX-5/LAN969x/Jaguar-2/Serval-T: TCL rules can now redirect frames to the CPU or loop back frames,
swapping MAC addresses. This is done using the fwd field in the mesa_tce_action_t structure.

MEF 10.3 Envelope Dual Leaky Bucket policer

The mesa_dlb_policer_conf_t structure has been extended with the following new attributes:

  • mesa_dlb_policer_conf_t::share_cir
  • mesa_dlb_policer_conf_t::share_eir
  • mesa_dlb_policer_conf_t::inherit_cir
  • mesa_dlb_policer_conf_t::inherit_eir

This enables configuring of sharing and inheriting of spill over tokens between DLB policers in a group,
to support the Envelope policing as describer in MEF 10.3

ACL: Support for IPv6 SIP and source MAC matching

The mesa_ace_frame_ipv6_t structure has been extended with a
mesa_ace_frame_ipv6_t::sip_smac field to support matching on IPv6 source
address and MAC source address.

This can be used to implement IPv6 source guard support.

QOS: DWRR mode configuration

It is now possible to configure DWRR mode by using the
mesa_qos_port_conf_t::dwrr_mode field in mesa_qos_port_conf_t. The scheduler
can operate in line-rate or frame rate.

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MESA-2025.09

MESA-2025.09

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@allannielsen allannielsen released this 25 Sep 09:44
v2025.09
adf465b 
Version:          MESA-2025.09
Previous Version: MESA-2025.06
Date:             2025-09-25
Description:      Roadmap release

MISRA Compliance on lan969x_lm target

The lan969x_lm CMake target has been taken through MISRA-C:2023 compliance.
This target is being used in VelocityDRIVE-SP, and it is this project which has
been driving the MISRA enforcement.

The majority of changes are internally, but a few changes have been made in the
public header files. Changes in the public headers are mostly renaming of the
include-guard define, and adding a U suffix to various constant defines used
as unsigned, and finally the mesa_capability signature has changed to use
the enumerated value of the capability instead of an int.

Coverity is being used to perform the compliance test, and all MISRA-C:2023
mandatory and required rules are passing in the lan969x_lm target when used by
VelocityDRIVE-SP

We have observed that Coverity does not report violations on functions
not being used, and due to this, it is expected the MISRA coverage at this
point, only reflect what is used in VelocityDRIVE-SP. Additional
tailoring will likely be needed if other applications need MISRA compliance.

Additional HSR functionality for PTP support

The mesa_packet_tx_info_t structure has been extended with the following new
attributes: mesa_packet_tx_info_t::rb_tag_ptp,
mesa_packet_tx_info_t::rb_path_id and mesa_packet_tx_info_t::rb_seq_no.

These additional attributes are needed if doing SW forwarding of PTP frames over
HSR.

Port CPU masquerading

Platforms that implement the MESA_CAP_PORT_CPU_MASQUERADING (only the Laika
target supports this capability), can now configure a port to be masquerading
for CPU0 or CPU1.

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MESA-2025.06

MESA-2025.06

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@allannielsen allannielsen released this 26 Jun 06:41
v2025.06
26bb461 
Version:          MESA-2025.06
Previous Version: MESA-2025.03
Date:             2025-06-27
Description:      Roadmap release

Sparx5: Added Support for Hierarchical Quality of Service (HQoS)

The MESA API has been extended with a new interface
(mesa/include/microchip/ethernet/switch/api/hqos.h) to enable HQoS. Currently,
this API is only implemented by Sparx5.

With HQoS, an ingress TCAM is used to classify traffic (typically a service) to
a mesa_hqos_id_t. Then, after the forwarding process, on the egress side, it
is possible to configure a scheduling element per port per HQoS ID (see
mesa_hqos_add()). Each service-layer scheduling element can perform traffic
shaping and Deficit Weighted Round Robin scheduling (DWRR) before traffic is
forwarded to the port's scheduling element.

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MESA-2025.03

MESA-2025.03

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@allannielsen allannielsen released this 27 Mar 08:20
v2025.03
699d72e 
Version:          MESA-2025.03
Previous Version: MESA-2024.12-1
Date:             2025-03-27
Description:      Roadmap release

LAN966x: Added additional MUX-Modes

The following MUX modes have been added:

  • 2xCu + 1x2.5G + 2xRGMII
  • 2xCu + 2xRGMII + 1xQSGMII (LAN9668)

RedBox (HSR/PRP) PTP Configuration support added

Notice: this feature is only available on SoCs with HSR/PRP support. Currently,
this is limited to the LAN969x-RED family.

The mesa_rb_ptp_conf_get and mesa_rb_ptp_conf_set APIs have been added to
configure how PTP frames shall be handled in the RedBox.

In addition, the mesa_packet_rx_info_t struct has also been extended with
additional RedBox meta-data.

Add API to get PCS status

Notice: this feature is currently only implemented for LAN966x.

The mesa_port_pcs_status_get API has been added to allow polling/reading the
PCS status.

This is useful if having a board with dual-media ports where either the
integrated Cu PHY can be used or the SFP. In this case, it is possible to check
if there is a link on the SFP before switching to SFP.

Per port inner-TAG based discard of frames

The mesa_tag_discard_t structure has been added to support discarding selected
frames with an inner tag.

Change BSP and Toolchain install folder

In this release the BSP and Toolchain are installed in /opt/mchp (instead of
/opt/mscc which has been used until now).

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MESA-2024.12-1

MESA-2024.12-1

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@allannielsen allannielsen released this 10 Jan 10:11
v2024.12-1
ecae5c4 
Version:          MESA-2024.12-1
Previous Version: MESA-2024.12
Date:             2025-01-10
Description:      Bugfix-release

Fix a regression where ports could show false-link

The 2024.12 release has introduced a regression observed on Jaguar2 with Aquantia PHY side-board where the FW sometimes reported a false link.

The issue was wrong handling of link state in cases where a copper PHY is connected via SFI.

This issue is fixed in 2024.12-1 release.

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MESA-2024.12

MESA-2024.12

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@allannielsen allannielsen released this 19 Dec 06:54
v2024.12
cdfcc59 
Version:          MESA-2024.12
Previous Version: MESA-2024.09
Date:             2024-12-19
Description:      Roadmap release

Additional configuration options related to PTP/HSR (redbox)

The mesa_acl_ptp_action_conf_t and mesa_ts_operation_mode_t structures have
been extended with additional fields to control how PTP frames are processed.

Additional MAC-tables configuration to support TC11

The mesa_learn_mode_t type has been extended with a one_shot and
learn_limit fields. The one_shot mode ensures that a learned entry cannot
move to a different port, and lean_limit puts a budget on how many entries can
be learned on a given port.

Both features are added to support TC11.

Support of in-band time-stamping via preamble (PHC)

The mesa_ts_operation_mode_t structure has been extended with additional
fields to support in-band timestamping. This feature requires a PHY supporting
PCH as well.

Support of HSR/Mode U

The mesa_rb_conf_t structure has been extended with flag to support Mode U.

Mode U enabled means:

If a unicast frame arrives on an LRE port and the DMAC of the frame is in the
PNT, forward it to the other LRE port (as well as to the interlink port).

If Mode U is disabled, such a frame will only be forwarded to the interlink
port.

This overcomes issues where it can take up to PNT timeout (60 seconds by
default) for frames to come through again if certain links are broken.

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MESA-2024.09

MESA-2024.09

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@allannielsen allannielsen released this 26 Sep 12:07
v2024.09
080f46b 
Version:          MESA-2024.09
Previous Version: MESA-2024.06-1
Date:             2024-09-26
Description:      Roadmap release

MEPA/MESA Split

MEPA-Only customers shall no longer use this repo to pull MEPA updates.

MESA will continue to have an inline copy of MEPA in the usual place (the
/mepa folder in the root). But this inline copy may not be in sync with the
yet-to-come MEPA stand-alone repository. The MEPA copy inlined in MESA will be
the version used during the test and qualification phase of the release.

Rule of thumb:

  • MESA/Switch users should not see any changes. They should use the version of
    MEPA inlined in the MESA repository/release.
  • Standalone MEPA users (if using the PHY without a MESA supported switch -
    could be a KSZ switch, a switch from another vendor or in a NIC design),
    should in the future pull MEPA from the designated MEPA repository
    instead of using MESA.

Signature change of mesa_ts_multi_domain_timeofday_get()

The signature of mesa_ts_multi_domain_timeofday_get() function has changed to
return an array of time stamps.

New mesa_mdio_conf_set() API added

A new API to configure the MDIO Bus frequency has been added.

BSP and Toolchains

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