Reset CPU registers, EFLAGS, and stack memory between runs

[williballenthin]

Summary

• Zero all general-purpose registers (EAX-EDI on x86, RAX-R15 on x64) and reset EFLAGS to 0x2 between runs
• Clear stack memory contents between runs (not just the stack pointer)
• Prevents state bleed across entry points/threads when using all_entrypoints=True

Previously, only ESP/EBP were reset between runs. The remaining CPU state (GP registers, EFLAGS, stack contents) was inherited from the prior run. This caused silent corruption (e.g., DF bleed breaking rep movs), order-dependent results, and non-reproducible reports.

Closes #304
Closes #305

Test plan

• New test_registers_reset_between_runs (x86 + x64): hooks first instruction of each run, asserts GP registers are zeroed and DF is clear
• New test_stack_cleared_between_runs: asserts 256 bytes below SP are zeroed at the start of each subsequent run
• Full test suite passes (141 passed, 14 skipped; 2 pre-existing failures from missing capa-testfiles)

🤖 Generated with Claude Code

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