[SYCL] PR 5 - Remove FPGA Attributes from SYCL FE#21771
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KornevNikita merged 1 commit intointel:syclfrom Apr 16, 2026
Merged
[SYCL] PR 5 - Remove FPGA Attributes from SYCL FE#21771KornevNikita merged 1 commit intointel:syclfrom
KornevNikita merged 1 commit intointel:syclfrom
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Fznamznon
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Apr 15, 2026
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@intel/llvm-gatekeepers please consider merging |
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This removes the following attributes:
__attribute__((pipe))__attribute__((io_pipe_id))