This repos holds the artifact of HPCA '26 paper "DSAssassin: Cross-VM Side-Channel Attacks by Exploiting Intel Data Streaming Accelerator".
dsa-reversing
├── attack # Attack experiments
├── evaluate # Evaluation scripts
├── ISSUES.md # FAQ
├── LICENSE
├── playground # Reverse-engineering
│ ├── atc # DevTLB
│ └── wq # Shared work queue
├── README.md
└── setup # Environment setup
├── config
├── dto
├── vpp
├── Dockerfile.*
└── setup_dsa.sh
Note
This experiment requires Ubuntu 24.04 LTS and Intel 4th Gen Xeon Scalable (or newer) who has DSA integration. Root privilege is required to setup and run the experiment.
Make sure the driver of DSA and VT-d is properly installed and configured during bootup. The following command do output something to verify that they're working.
# check if DSA is enabled
sudo dmesg | grep "idxd "
sudo lspci | grep 0b25
# check if VT-d is supported
cat /sys/bus/dsa/devices/dsa0/pasid_enabledIf you didn't see output from the above commands, see user guide chapter 12 for troubleshooting.
Setup accel-config / libaccel-config and its dependencies.
sudo apt install accel-config libaccel-config-dev \
libaccel-config1 uuid-devEnable DSA with configuration (sudo required), and grant read/write priviledge to user.
export ROOTDIR=$(pwd) # dsa-reversing root directory
cd $ROOTDIR/setup && chmod +x *.sh
sudo ./setup_dsa.sh config/common.conf
# or manually
sudo accel-config load-config -c setup/config/common.conf -e
sudo chmod 766 /dev/dsa/*playground holds the experiment sources. For example, in playground/wq you can find the source code of the workload queue (WQ) experiment.
cd $ROOTDIR/playground/wq && mkdir -p build # or playground/atc
make buildallSee playground/README.md for more details.
See attack/README.md for attack experiments.
If you encounter any issue, please see ISSUES.md first. Open an issue if it doesn't help.
Thanks for citing this paper/artifact!
@inproceedings{chen2026dsassassin,
title={DSAssassin: Cross-VM Side-Channel Attacks by Exploiting Intel Data Streaming Accelerator},
author={Chen, Ben and Li, Kunlin and Deng, Shuwen and Wang, Dongsheng and Chen, Yun},
booktitle={2026 IEEE International Symposium on High-Performance Computer Architecture (HPCA)},
year={2026},
organization={IEEE}
}
- Intel(R) Data Streaming Accelerator User Guide
- Intel(R) Data Streaming Accelerator Architecuture Specification
- https://github.com/intel/dsa-perf-micros
- https://github.com/ligato/vpp-base
We provide this code as-is, for research purpose only. You are responsible for protecting yourself, your property and privacy. Any risks or damage caused by this code will not be covered.