docs(palace): validate IHP cmim against PDK compact model + fix MIM meshing

[mdmaas]

Summary

Updates nbs/_palace_electrostatic.ipynb to actually validate the IHP cmim (MIM capacitor) against the PDK cap_cmim compact model, using the split MIM stack from gdsfactory/IHP#188/#225.

Notebook changes

• Measure the device capacitance between Metal5 (bottom, T1) and the mim top-plate (top, T2), which are the two electrodes separated by the 40 nm mim_diel. (The previous T2='topmetal1' only measured ~1 fF of via/routing coupling, not the device.)
• Evaluate the PDK reference via TECH/CbCapCalc (the supported API) instead of the removed ihp.cells2...Numeric import.
• Run locally with sim.run_local() + sim.write_config() (with the cloud sim.run() variant commented out).
• Document the residual gap as an open investigation point, not an expected error.

gsim meshing fix (src/gsim/palace/mesh/geometry.py)

Required for the fixed IHP stack to be modeled correctly:

• get_layer_infos() lets multiple LayerLevels share one GDS layer (mim_diel dielectric + mim conductor both on MIMdrawing) so each meshes at its own z-height. Previously only the first layer was used and the top-plate conductor was silently dropped.
• Lower min_volume_thickness 0.05 → 0.02 µm so the 40 nm MIM dielectric is meshed as a solid volume instead of skipped.

Result

Palace mutual Cm[1,2] = 194.2 fF vs IHP cap_cmim = 151.9 fF (ratio 1.28).

Note on the residual gap

• Likely contributors to the residual are full 3D fringe/perimeter field vs the compact model's area+perimeter fit, and the PDK's effective permittivity (≈6.8) vs the sin stack value (≈7.5).
• Palace's electrostatic solver models terminals as ideal equipotential (Dirichlet) surfaces and does not apply a surface-conductivity / conductor-thickness boundary condition. So any dependence of the capacitance on plate thickness / surface conductivity cannot currently be exercised here — a solver-level limitation.

Depends on an IHP PDK build carrying the MIM stack fix (gdsfactory/IHP#225); not yet on PyPI.

[codecov]

Codecov Report

❌ Patch coverage is 67.50000% with 26 lines in your changes missing coverage. Please review.
✅ Project coverage is 61.00%. Comparing base (f7616d0) to head (43d34ee).
⚠️ Report is 1 commits behind head on main.

Files with missing lines	Patch %	Lines
src/gsim/palace/mesh/geometry.py	67.50%	14 Missing and 12 partials ⚠️

Additional details and impacted files

@@            Coverage Diff             @@
##             main     #235      +/-   ##
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+ Coverage   60.92%   61.00%   +0.07%     
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  Files          97       97              
  Lines       14101    14108       +7     
  Branches     2859     2862       +3     
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+ Hits         8591     8606      +15     
+ Misses       4589     4585       -4     
+ Partials      921      917       -4     

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[mdmaas]

Hi @vvahidd. This is some progress, but we still have ~30% error with respect to the PDK.

Some possibilities:

• Maybe the PDK is assuming a 1d parallel-plate model, and is not including parasitic fringing fields?
• We also seem to be using slightly different effective permittivities (PDK's effective permittivity (≈6.8) vs the sin stack value (≈7.5). This would explain a 10% discrepancy.
• Highly unlikely but maybe assuming PEC electrodes is introducing some discrepancy due to skin effect (I think this should be < 1%).

[mdmaas]

Ok, I confirmed that increasing the device area reduces the discrepancy with the reference PDK values, so indeed the fringing fields are not being considered in the compact model.

[mdmaas]

Including the use of an effective permittivity and increasing the device area we get a clear trend of decreasing discrepancy, which indicates fringing fields were not present in the compact model

size	Palace (fF)	PDK (fF)	ratio	fringe %
5	52.31	38.45	1.360	28.0
10	178.39	151.90	1.174	15.7
15	379.46	340.35	1.115	10.9
20	655.58	603.80	1.086	8.4
25	1006.63	942.25	1.068	6.8