GitHub - alihysn/Calculator: Using verilog/display on FPGA

Name		Name	Last commit message	Last commit date
Latest commit History 1 Commit
BCD_Control.v		BCD_Control.v
Report.pdf		Report.pdf
anode_controller.v		anode_controller.v
bcd_cathodes.v		bcd_cathodes.v
bcd_seven_seg.v		bcd_seven_seg.v
binary_counter.v		binary_counter.v
calculator.v		calculator.v
clock_divider.v		clock_divider.v
constraint_file.xdc		constraint_file.xdc
main.v		main.v
test_bench.v		test_bench.v