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@@ -7,7 +7,7 @@ Secure Launch Specification | |||||||||
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| .. class:: center | ||||||||||
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| **Version:** 0.6.0-draft | ||||||||||
| **Version:** 0.7.0-draft | ||||||||||
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| .. class:: center | ||||||||||
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@@ -18,6 +18,7 @@ Secure Launch Specification | |||||||||
| **Daniel P. Smith** (Apertus Solutions) | ||||||||||
| **Ross Philipson** (Oracle) | ||||||||||
| **Krystian Hebel** (3mdeb) | ||||||||||
| **Sergii Dmytruk** (3mdeb) | ||||||||||
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| .. sectnum:: | ||||||||||
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@@ -99,6 +100,13 @@ Handler to be implemented by each platform supported by TrenchBoot. The | |||||||||
| specification provides a well-defined interface for DLE Handler and bootloader | ||||||||||
| implementors to follow to ensure interoperability between implementations. | ||||||||||
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| Dynamic Lauch Measured Environment Header | ||||||||||
| ----------------------------------------- | ||||||||||
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| The DLME Header is a platform agnositic header structure that a Secure | ||||||||||
| Launch-complaint kernel must implement. It is derived from Intel's MLE Header, | ||||||||||
| but generalized to allow it to be compatible with other platforms. | ||||||||||
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| Secure Launch Resource Table | ||||||||||
| ---------------------------- | ||||||||||
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@@ -173,8 +181,55 @@ Sequence | |||||||||
| Secure Launch Interfaces | ||||||||||
| ======================== | ||||||||||
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| There are two interfaces to be defined here, the DLE Handler Specifications and | ||||||||||
| the SLRT Specification. | ||||||||||
| Secure Launch Interfaces consist of three interfaces, the DLME Header, the DLE | ||||||||||
| Handler Specifications, and the SLRT Specification. | ||||||||||
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| DLME Header | ||||||||||
| ----------- | ||||||||||
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| Detailed below is the header structure that a Secure Launch-compatible kernel | ||||||||||
| must provide and is discoverable. The information provides details to the DLE | ||||||||||
| Handler to facilitate it in launching the kernel. | ||||||||||
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| DLME Header Structure | ||||||||||
| ~~~~~~~~~~~~~~~~~~~~~ | ||||||||||
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| A descripton of the DLME for the DLE Handler. | ||||||||||
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| :uuid0: Chunk 0 of UUID, 9082AC5A | ||||||||||
| :uuid1: Chunk 1 of UUID, 74A7476F | ||||||||||
| :uuid2: Chunk 2 of UUID, A2555C0F | ||||||||||
| :uuid3: Chunk 3 of UUID, 42B651CB | ||||||||||
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Member
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Should it be unconditionally included in non-TXT binaries as well? It probably makes sense for x86 as vendor can be easily detected, but I'm not so sure about other architectures.
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Yes, while it originates from Intel TXT, we want to standardize the dl-stub across architectures and this provides the cleanest, IOW maximize reuse, method to communicate the necessary information to the dl-stub |
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| :header_len: Length of the header. | ||||||||||
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Member
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. To be unambiguous since this is not always the case:
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. ack |
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| :version: Header version. | ||||||||||
| :entry_point: Address of the DLME entry point. | ||||||||||
| :first_valid_page: Address to first valid page of DLME. | ||||||||||
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I suppose it also needs to have zeroes in its lowest bits.
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. I would not specify 4K, it should be kept platform agnostic. I am good with the other wording change.
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Then could say |
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| :start: Offset to first byte of DLME within page space. | ||||||||||
| :end: Offset to last byte + 1 of DLME within page space. | ||||||||||
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. The base for the offsets is unspecified.
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. This is how it is defined in MLE guide, Note: linear addresses start at the beginning of the executable region of the binary, I am going to have to think of a good way to say this in relation to this spec. Suggestions are welcome. |
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| :capabilities: Bitfield of DLME supported capabilities. | ||||||||||
| :cmdline_start: Starting address of command line buffer. | ||||||||||
| :cmdline_end: Ending address of command line buffer. | ||||||||||
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| .. code-block:: c | ||||||||||
| :linenos: 1 | ||||||||||
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| struct slr_dlme_header { | ||||||||||
| u32 uuid0; | ||||||||||
| u32 uuid1; | ||||||||||
| u32 uuid2; | ||||||||||
| u32 uuid3; | ||||||||||
| u32 header_len; | ||||||||||
| u32 version; | ||||||||||
| u32 entry_point; | ||||||||||
| u32 first_valid_page; | ||||||||||
| u32 start; | ||||||||||
| u32 end; | ||||||||||
| u32 capabilities; | ||||||||||
| u32 cmdline_start; | ||||||||||
| u32 cmdline_end; | ||||||||||
| }; | ||||||||||
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| DLE Handler Specification | ||||||||||
| ------------------------- | ||||||||||
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@@ -184,19 +239,56 @@ The DLE Handler Specification defines the invocation interface for the DLE Handl | |||||||||
| Platform Requirements | ||||||||||
| ~~~~~~~~~~~~~~~~~~~~~ | ||||||||||
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| | **1** - x86 Platforms | ||||||||||
| | **1.1** - The DLE Handler **MAY** be invoked with the CPU in either 32bit | ||||||||||
| | **1** - General Requirements | ||||||||||
| | **1.1** - The DLME **SHALL** provide a DLME Header | ||||||||||
| | **1.2** - The DLME **SHALL** provide a mechanism to discover the DLME Header | ||||||||||
| | | ||||||||||
| | **2** - x86 Non-EFI Platforms | ||||||||||
| | **2.1** - The DLE Handler **MAY** be invoked with the CPU in either 32bit | ||||||||||
| | protected mode or 64bit long mode | ||||||||||
| | **1.2** - The SLRT **SHALL** be passed to the DLE Handler in the EDI/RDI CPU | ||||||||||
| | **2.2** - The SLRT **SHALL** be passed to the DLE Handler in the EDI/RDI CPU | ||||||||||
| | register | ||||||||||
| | **1.3** - All other registers besides EDI/RDI are not guarenteed | ||||||||||
| | **1.4** - The invoking code **SHALL** use a long jump to the DLE Handler | ||||||||||
| | **1.5** - The DLE Handler **SHALL NOT** return control on error | ||||||||||
| | **2.3** - All other registers besides EDI/RDI are not guarenteed | ||||||||||
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. A typo:
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. ack |
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| | **2.4** - The invoking code **SHALL** use a long jump to the DLE Handler | ||||||||||
| | **2.5** - The DLE Handler **SHALL NOT** return control on error | ||||||||||
| | | ||||||||||
| | **3** - x86 EFI Platforms | ||||||||||
| | **3.1** - The DLE Handler **SHALL** implement the Secure Launch EFI Protocol. | ||||||||||
| | | ||||||||||
| | **2** - Arm Platforms | ||||||||||
| | **2.1** - *Reserved* | ||||||||||
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| EFI SLaunch Protocol | ||||||||||
| ~~~~~~~~~~~~~~~~~~~~ | ||||||||||
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| On EFI platforms the DLE Handler must implement the EFI_SLAUNCH_PROTOCOL that provides the following methods. | ||||||||||
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| * **EFI_SLAUNCH_REGISTER_DLME**: Registers the DLME with the DLE Handler | ||||||||||
| * **EFI_SLAUNCH_LAUNCH**: Invokes the DLE Handler | ||||||||||
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| The interface definition for the protocol is as follows, | ||||||||||
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| .. code-block:: c | ||||||||||
| :linenos: 1 | ||||||||||
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| typedef struct tdEFI_SLAUNCH_PROTOCOL { | ||||||||||
| EFI_SLAUNCH_SLRT_UPDATE_REGISTER_DLME RegisterDlme; | ||||||||||
| EFI_SLAUNCH_LAUNCH Launch; | ||||||||||
| } EFI_SLAUNCH_PROTOCOL | ||||||||||
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. ack |
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| typedef EFI_STATUS (EFIAPI *EFI_SLAUNCH_REGISTER_DLME) ( | ||||||||||
| IN EFI_SLAUNCH_PROTOCOL *This, | ||||||||||
| IN EFI_PHYSICAL_ADDRESS *DlmeBase | ||||||||||
| IN EFI_PHYSICAL_ADDRESS *DlmeHeader | ||||||||||
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. ack |
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| IN EFI_PHYSICAL_ADDRESS *DlmeConfigTable | ||||||||||
| ); | ||||||||||
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| typedef EFI_STATUS (EFIAPI *EFI_SLAUNCH_LAUNCH) ( | ||||||||||
| IN EFI_SLAUNCH_PROTOCOL *This | ||||||||||
| ); | ||||||||||
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| SLRT Specification | ||||||||||
| ------------------ | ||||||||||
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@@ -213,7 +305,7 @@ able to meet. The supplemental sections will cover any idiosyncrasies for the | |||||||||
| various platforms and environments supported. | ||||||||||
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| Platform Requirements | ||||||||||
| --------------------- | ||||||||||
| ~~~~~~~~~~~~~~~~~~~~~ | ||||||||||
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| | **1** - General Requirements | ||||||||||
| | **1.1** - The SLRT **MUST** begin with the magic value `0x4452544d`. | ||||||||||
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@@ -359,6 +451,8 @@ invoke the DLE Handler and for the DLE Handler to invoke the DL. | |||||||||
| :dlme_size: The size of the DLME. | ||||||||||
| :dlme_base: The base address where the DLME is located. | ||||||||||
| :dlme_entry: The offset into the DLME of the entry point. | ||||||||||
| :dlme_header_offset: The offest into the DLME of the DLME Header. | ||||||||||
| :dlme_config_table: The offsee into the DLME of the DLME Config Table. | ||||||||||
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. ack |
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| :bl_context: Allows the bootloader to provide a reference to a context object. | ||||||||||
| :dl_handler: The address to the entry point for the DLE Handler. | ||||||||||
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@@ -372,6 +466,8 @@ invoke the DLE Handler and for the DLE Handler to invoke the DL. | |||||||||
| u64 dlme_size; | ||||||||||
| u64 dlme_base; | ||||||||||
| u64 dlme_entry; | ||||||||||
| u64 dlme_header_offset; | ||||||||||
| u64 dlme_config_table; | ||||||||||
| struct slr_bl_context bl_context; | ||||||||||
| u64 dl_handler; | ||||||||||
| }; | ||||||||||
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@@ -888,8 +984,7 @@ it in the TXT Heap definition. This area is referred to as the OS2MLE structure. | |||||||||
| The OS2MLE structure for Secure Launch is defined as follows, | ||||||||||
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| :version: Revision of the os2mle table | ||||||||||
| :boot_params_addr: | ||||||||||
| Physical address of boot parameters, format depends on target kernel | ||||||||||
| :reserved: Reserved field | ||||||||||
| :slrt: Physical address of the SLRT | ||||||||||
| :txt_info: | ||||||||||
| Physical address of TXT info, located in SLRT (simply a convenience to avoid | ||||||||||
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@@ -906,12 +1001,11 @@ The OS2MLE structure for Secure Launch is defined as follows, | |||||||||
| struct os2mle { | ||||||||||
| u32 version; | ||||||||||
| u32 reserved; | ||||||||||
| u64 boot_params_addr; | ||||||||||
| u64 slrt; | ||||||||||
| u64 txt_info; | ||||||||||
| u64 txt_info; | ||||||||||
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Remove trailing space.
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. ack. |
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| u32 ap_wake_block; | ||||||||||
| u32 ap_wake_block_size; | ||||||||||
| u8 mle_scratch[64]; | ||||||||||
| u8 mle_scratch[64]; | ||||||||||
| }; | ||||||||||
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| [1] https://www.kernel.org/doc/html/v6.12/arch/x86/boot.html#details-of-header-fields | ||||||||||
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Are there any alignment requirements?
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The only requirement from TXT spec is that it must be within the MLE range. If we want to impose alignment, I'm open to that discussion. It may require a slight change to the Linux series, though I don't think it would be difficult.
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I'm just thinking of AArch64 and other platforms that don't allow misaligned accesses. If you don't think this will cause problems when storing/reading the structure, then can explicitly say that the structure is 1-byte aligned.