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fix ssd cache assoc wave32#162

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aryaman/fix-ssd-cache-assoc-wave32
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fix ssd cache assoc wave32#162
aryaman-gupta wants to merge 5 commits into
jeff_5804from
aryaman/fix-ssd-cache-assoc-wave32

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@aryaman-gupta

@aryaman-gupta aryaman-gupta commented Jun 17, 2026

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Summary

The SSD inference cache (SSDIntNBitTableBatchedEmbeddingBags and the Turbo SSD serving path) hardcoded associativity to 64 on ROCm. The cache kernels scan one slot per warp lane, so on wave32 (RDNA, e.g. gfx1201) the host
allocated 64-way sets that the kernel only half-scanned — slots 32–63 were unreachable, producing incorrect lookups.

This derives the associativity from the device warp size instead (32 on NVIDIA, either 32 or64 on AMD) via a shared device_cache_assoc() resolver in tbe/ssd/common.py, used by both inference and serving sizing math. An explicit cache_assoc argument is validated against the resolved warp size and raises on mismatch, so callers cannot silently request a broken geometry. The module-level ASSOC is now an unconditional 32 fallback for the no-device path.

Test plan

  • Added SSDInferenceAssocWarpSizeTest (runs in OSS, no RocksDB) — passes on gfx1201, asserts associativity == device warp size.
  • Updated SSDInferenceAMDSupportTest to assert against cache_assoc; the simulated-ASSOC=64 tests now patch device_cache_assoc to exercise the 64-way path on any device.
  • Full SSD test suite is OSS-gated (requires the RocksDB backend) — needs validation on an internal build, and a wave64 (CDNA) run to confirm no regression.

aryaman-gupta and others added 5 commits June 17, 2026 08:17
The SSD inference cache hardcoded associativity to 64 on ROCm, but the
cache kernels scan one way per warp lane, so on wave32 (RDNA) half the
ways were unreachable. Derive cache_assoc from the device warp size in
SSDIntNBitTableBatchedEmbeddingBags and the Turbo SSD serving sizing math
instead, and make the module-level ASSOC an unconditional 32 fallback.

Co-Authored-By: Claude <noreply@anthropic.com>
…esolver

Add a shared device_cache_assoc() resolver in tbe/ssd/common.py (the single
source of truth: device warp size, ASSOC fallback when no device) and use it
from both inference and serving. The inference module now validates an explicit
cache_assoc against the resolved warp size and raises on a mismatch, so callers
cannot silently request a broken cache geometry. Tests patch the resolver to
exercise the 64-way path on any device.

Co-Authored-By: Claude <noreply@anthropic.com>
Keeps the sets x ways formulation, reading the per-instance cache_assoc
rather than total element count.

Co-Authored-By: Claude <noreply@anthropic.com>
Restore the simulated_assoc64 test names, sim_assoc variable, and baseline
docstrings/comments, changing only the patch target to device_cache_assoc.
Reword "way" to "slot" in cache-associativity comments for clarity.

Co-Authored-By: Claude <noreply@anthropic.com>
@aryaman-gupta aryaman-gupta marked this pull request as ready for review June 26, 2026 18:21

@avbokovoy avbokovoy left a comment

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LGTM

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3 participants