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Migrate PTO 0.57 tile kernels into SuperNPUBench - #22

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codex/migrate-pto-kernels
Jul 22, 2026
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Migrate PTO 0.57 tile kernels into SuperNPUBench#22
zhoubot merged 1 commit into
mainfrom
codex/migrate-pto-kernels

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@zhoubot zhoubot commented Jul 22, 2026

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Summary

  • migrate nine source-backed kernels from LinxISA/PTO-Kernel at pinned revision 0eb72cb20b0de99326d984a9a27ddb815e6e4c24
  • keep active data paths tile-only and limited to the LinxISA PTO 0.57 intrinsic allowlist
  • isolate and hash-pin the minimal imported support-header surface
  • add one-level build wrappers, full generated benchmark pages, navigation, and a migration tutorial

Migrated cases

  • memory: pto_tload_store
  • elementwise: pto_add
  • matmul: pto_gemm, pto_gemm_basic, pto_gemm_demo, pto_gemm_performance, pto_mamulb, pto_tmatmul_acc
  • attention: pto_flash_attention

Verification

  • 9/9 Linx LLVM builds and disassemblies
  • named BSTART.T* blocks, including BSTART.TMATMUL.ACC
  • 9/9 host-simulation smoke runs
  • nonzero tile-add and TMATMUL_ACC host oracle
  • 62/62 active manifest dry-runs
  • PTO migration provenance/allowlist verifier
  • strict MkDocs build
  • golden-manual catalog and internal-link verifier
  • independent code review clean after fixes

Known gap

Direct bare-ELF QEMU execution was not run because this checkout has system-emulator binaries but no qemu-linx runner expected by the benchmark Makefile.

Import nine source-backed PTO-Kernel cases across memory, elementwise, GEMM, and attention. Keep their active data paths tile-only, isolate the imported support surface, and publish complete generated source pages.

Constraint: Migrated kernels must remain within the LinxISA PTO 0.57 allowlist and the one-level website profile.
Rejected: Import scalar fallback implementations | they would weaken the benchmark's tile-only programming contract.
Confidence: high
Scope-risk: moderate
Directive: Update migration.json provenance and support-header digests whenever imported code changes.
Tested: 9 Linx LLVM builds and disassemblies; 9 host smoke runs; nonzero add/TMATMUL_ACC oracle; 62 manifest dry-runs; strict MkDocs build; golden-manual and link verification.
Not-tested: Direct bare-ELF QEMU execution because no qemu-linx runner is installed in this checkout.
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zhoubot merged commit b3da09a into main Jul 22, 2026
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zhoubot deleted the codex/migrate-pto-kernels branch July 22, 2026 17:31

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💡 Codex Review

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Reviewed commit: 4be0d7fb5e

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Comment on lines +757 to +759
const int32_t a = static_cast<int32_t>(lhs.words[a_idx]);
const int32_t b = static_cast<int32_t>(rhs.words[b_idx]);
acc += static_cast<int64_t>(a) * static_cast<int64_t>(b);

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P2 Badge Honor floating-point dtypes in host GEMM

When PTO_HOST_SIM is enabled for the FP32 migrated GEMMs (pto_gemm_basic, pto_gemm_demo, and pto_gemm_performance), TLOAD stores raw IEEE float bits in RawTile, but this host TMATMUL path casts those words to int32_t and multiplies the bit patterns. A simple all-ones FP32 GEMM therefore produces zero/nonsense instead of the expected sum, so the advertised host smoke/oracle cannot validate these kernels unless the operands are decoded by dtype and the result is re-quantized for floating-point tiles.

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static_assert(SizeCode >= 5u && SizeCode <= 8u,
"PTO Linx canonical v0.57: size_code must be in [5,8]");
#if defined(PTO_HOST_SIM)
(void)Layout;

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P2 Badge Respect tile load layout in the host simulator

When PTO_HOST_SIM loads RHS tiles for the migrated GEMM/attention kernels, those tensors are declared ColMajor, but the host path discards Layout and then reads every tile as rows with contiguous columns. Any non-uniform column-major RHS is loaded with the wrong elements, so integer host-simulation oracles can pass only degenerate inputs; the host load path needs to apply the layout/stride mapping instead of ignoring it.

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