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[CI] Make wrapper2/wrapper3 exercise small systolic-array configs#272

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YWHyuk merged 1 commit into
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feature/ci-wrapper2-config
Jun 24, 2026
Merged

[CI] Make wrapper2/wrapper3 exercise small systolic-array configs#272
YWHyuk merged 1 commit into
developfrom
feature/ci-wrapper2-config

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@YWHyuk YWHyuk commented Jun 24, 2026

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Problem

The test-pytorchsim-wrapper2 CI job injects vpu_num_lanes=32 and vpu_spad_size_kb_per_lane=32 as docker env vars to test a small configuration. But since the unified-config refactor (9db0f2ce), extension_config.py reads these values only from the TOGSim YAML, never from the environment:

if name == "vpu_num_lanes":
    return config_yaml["vpu_num_lanes"]   # os.environ is never consulted

So the env vars are silently ignored and wrapper2 falls back to the default 128x128 config, making it an exact duplicate of wrapper1.

TOGSim (the C++ cycle sim) also reads vpu config from the --config YAML, not from env, so reviving an env override would only desync codegen from the cycle model and fight the unified-config design.

Fix (single source of truth)

Select a config YAML via TOGSIM_CONFIG so one file drives both codegen and the TOGSim cycle model. vpu_num_lanes also sets the systolic-array dimension, so each config exercises a different array size.

  • configs: add systolic_ws_32x32_c1_simple_noc_tpuv3.yml (32x32 array, 32 KB/lane SPAD) and systolic_ws_8x8_c1_simple_noc_tpuv3.yml (8x8 array, 32 KB/lane SPAD); both identical to the tpuv3 default otherwise.
  • pytorchsim_test.yml: replace the vector_lane/spad_size number inputs with togsim_config (string) and run_accuracy (bool). Every job now sets -e TOGSIM_CONFIG instead of the dead vpu_* env vars. The accuracy/speedup job is gated on run_accuracy instead of vector_lane == 128.
  • docker-image.yml: wrapper1 -> 128x128 config + run_accuracy: true; wrapper2 -> 32x32 config; wrapper3 -> 8x8 config (run_accuracy: false).

Verification

  • Both workflow YAMLs parse cleanly.
  • With TOGSIM_CONFIG pointed at each new config, extension_config reads vpu_num_lanes = 32 / 8 and SPAD = 32 KB/lane respectively; the default still reads 128/128. wrapper2 and wrapper3 now genuinely exercise the smaller array paths for codegen and the cycle sim consistently.

@YWHyuk YWHyuk force-pushed the feature/ci-wrapper2-config branch 2 times, most recently from 4be79c4 to 57d18a2 Compare June 24, 2026 12:32
The wrapper2 test job passed vpu_num_lanes and vpu_spad_size_kb_per_lane
as docker env vars, but since the unified-config refactor (9db0f2c) the
frontend reads these values only from the TOGSim YAML, never from the
environment. The env vars were therefore silently ignored and wrapper2
ran with the default 128x128 config, making it an exact duplicate of
wrapper1.

Switch the reusable workflow to select a config YAML via TOGSIM_CONFIG so
that a single file drives both codegen and the TOGSim cycle model, in
line with the unified-config design. vpu_num_lanes also sets the systolic
array dimension, so each config exercises a different array size:

- configs: add systolic_ws_32x32_c1_simple_noc_tpuv3.yml (32x32 array,
  32 KB/lane SPAD) and systolic_ws_8x8_c1_simple_noc_tpuv3.yml (8x8
  array, 32 KB/lane SPAD); both identical to the tpuv3 default otherwise
- pytorchsim_test.yml: replace vector_lane/spad_size inputs with
  togsim_config (string) and run_accuracy (bool); every job now sets
  -e TOGSIM_CONFIG instead of the dead vpu_* env vars
- docker-image.yml: wrapper1 -> 128x128 config + run_accuracy true,
  wrapper2 -> 32x32 config, wrapper3 -> 8x8 config (run_accuracy false)
@YWHyuk YWHyuk force-pushed the feature/ci-wrapper2-config branch from 57d18a2 to 7b58700 Compare June 24, 2026 12:32
@YWHyuk YWHyuk changed the title [CI] Make wrapper2 actually exercise the 32x32 config [CI] Make wrapper2/wrapper3 exercise small systolic-array configs Jun 24, 2026
@YWHyuk YWHyuk merged commit 365cdab into develop Jun 24, 2026
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