Release Linx ISA v0.57 integration - #66
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Update the outer-cube superscalar design references so the active documentation points only at the released ISA profile. Constraint: Active architecture documentation must not route implementers to v0.56.\nConfidence: high\nScope-risk: narrow\nDirective: Keep design references synchronized with the superproject release profile.\nTested: documentation diff validation.\nNot-tested: pyCircuit build because no executable source changed.
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Code Review
This pull request updates the Davinci superscalar design documentation to refine instruction mappings and descriptions. Specifically, it clarifies that VFMOD and VLRELU are Davinci-local operations without canonical LinxISA v0.57 origins, updates the VPRELU description, and renames TTRANS to TTRANSPOSE. The review feedback identifies a typo and redundancy in the updated VPRELU description, where 'TEPL' should be 'TPRELU' and the version reference should be corrected to v0.56.
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| | VSUBC | TSUBC | Td, Ts1, Ts2, Ts3 | Td[i,j] = Ts1[i,j] − Ts2[i,j] + Ts3[i,j] | same | 16 | | ||
| | VFMA | — | Td, Ts1, Ts2, Ts3 | Td[i,j] = Ts1[i,j] × Ts2[i,j] + Ts3[i,j] | FP64/32/16/BF16 | 16 | | ||
| | VPRELU | TPRELU | Td, Ts1, Ts2 | Td[i,j] = Ts1[i,j]≥0 ? Ts1[i,j] : Ts1[i,j]×Ts2[i,j] | FP32/16/BF16 | 16 | | ||
| | VPRELU | TPRELU | Td, Ts1, Ts2 | Inherited canonical v0.57 TEPL operation retained unchanged in v0.57 | FP32/16/BF16 | 16 | |
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There is a typo in the description for VPRELU. TEPL should be TPRELU. Additionally, the phrase 'Inherited canonical v0.57 ... retained unchanged in v0.57' is redundant and likely meant to refer to inheriting the operation from the v0.56 baseline.
| | VPRELU | TPRELU | Td, Ts1, Ts2 | Inherited canonical v0.57 TEPL operation retained unchanged in v0.57 | FP32/16/BF16 | 16 | | |
| | VPRELU | TPRELU | Td, Ts1, Ts2 | Inherited canonical v0.56 TPRELU operation retained unchanged in v0.57 | FP32/16/BF16 | 16 | |
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Integrates this repository with the standalone Linx ISA v0.57 release built from the v0.56.5 baseline. Removes active legacy v0.56 naming and aligns implementation, tests, and documentation with the v0.57 scalar/PTO contract, including TPREFETCH adjacency to TLOAD/TSTORE where applicable.\n\nValidation was run from the LinxISA superproject release branch; repository-specific build and regression evidence is recorded in the commits and superproject release notes.