Close arbitrary rectangular TileKernels on v0.57 - #156
Conversation
The v0.57 closure now pins the merged LLVM, QEMU, and PTO-Kernel implementations and adds standard plus rectangular-tail AVS oracles for transpose, MOE normalization, quantization, and MHC normalization. Constraint: pyCircuit and LinxCore are intentionally excluded from this closure and their gitlinks are unchanged. Constraint: v0.57 rectangular validity uses LB0 ValidCol, LB1 ValidRow, and LB2 physical Col. Confidence: high Scope-risk: broad Directive: Do not add pyCircuit or LinxCore to this closure until explicitly requested. Tested: merged LLVM focused lit 4/4; PTO host CTest 4/4; DeepSeek cross assembly contracts; QEMU TileKernels 5/5; strict TSVC compile floor and eight QEMU batches. Not-tested: full OS boot; umbrella PTO FlashAttention target retains its pre-existing CUDA-launch parsing failure.
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Code Review
This pull request increases the test storage array sizes to kStorageElements (2048) in avs/qemu/tests/17_deepseek_tilekernels.cpp and adds new test cases for tail-processing scenarios across transpose, MoE weight normalization, quantization, and MHC normalization. It also fixes an indexing bug in the quantization test and updates several subproject commits. The review feedback suggests adding compile-time static_assert checks in the new tail-processing test blocks to ensure that the calculated tail elements do not exceed kStorageElements, preventing potential out-of-bounds memory access if dimensions are modified in the future.
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| constexpr int tail_rows = 35; | ||
| constexpr int tail_cols = 37; | ||
| constexpr int tail_elements = tail_rows * tail_cols; |
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To ensure defensive programming and prevent potential out-of-bounds memory access if the tail dimensions are modified in the future, it is highly recommended to add a compile-time static_assert verifying that the total number of tail elements does not exceed the allocated storage size (kStorageElements).
constexpr int tail_rows = 35;
constexpr int tail_cols = 37;
constexpr int tail_elements = tail_rows * tail_cols;
static_assert(tail_elements <= kStorageElements, "tail_elements exceeds kStorageElements");| constexpr int tail_rows = 3; | ||
| constexpr int tail_cols = 5; |
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Add a compile-time static_assert to ensure that the tail elements do not exceed kStorageElements to prevent potential out-of-bounds memory access if the dimensions are modified in the future.
| constexpr int tail_rows = 3; | |
| constexpr int tail_cols = 5; | |
| constexpr int tail_rows = 3; | |
| constexpr int tail_cols = 5; | |
| static_assert(tail_rows * tail_cols <= kStorageElements, "Tail elements exceed kStorageElements"); |
| constexpr int tail_rows = 3; | ||
| constexpr int tail_cols = 5; |
There was a problem hiding this comment.
Add a compile-time static_assert to ensure that the tail elements do not exceed kStorageElements to prevent potential out-of-bounds memory access if the dimensions are modified in the future.
| constexpr int tail_rows = 3; | |
| constexpr int tail_cols = 5; | |
| constexpr int tail_rows = 3; | |
| constexpr int tail_cols = 5; | |
| static_assert(tail_rows * tail_cols <= kStorageElements, "Tail elements exceed kStorageElements"); |
| constexpr int tail_rows = 3; | ||
| constexpr int tail_cols = 5; |
There was a problem hiding this comment.
Add a compile-time static_assert to ensure that the tail elements do not exceed kStorageElements to prevent potential out-of-bounds memory access if the dimensions are modified in the future.
| constexpr int tail_rows = 3; | |
| constexpr int tail_cols = 5; | |
| constexpr int tail_rows = 3; | |
| constexpr int tail_cols = 5; | |
| static_assert(tail_rows * tail_cols <= kStorageElements, "Tail elements exceed kStorageElements"); |
Pins the merged runtime-shape implementations in LLVM, QEMU, and PTO-Kernel and adds QEMU AVS coverage for 35x37 multi-tile transpose plus 3x5 MOE, quantization, and MHC tails. pyCircuit and LinxCore are explicitly excluded and remain unpinned.\n\nVerified on the exact merged submodule SHAs: LLVM focused lit 4/4; PTO host CTest 4/4; DeepSeek cross assembly contracts; QEMU TileKernels 5/5; strict TSVC compile floor and all eight QEMU batches without timeout.\n\nKnown baseline outside this closure: umbrella PTO FlashAttention target has an existing CUDA-launch syntax parse failure; broad LLVM LinxISA CodeGen has 12 existing failures and one unresolved test.