Conversation
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@bmdhacks this new version is passing haxe unit tests. It still have a few issues that I need to investigate and I need to update debugger support but it's a good basis for ARM support as only the code generator needs to be swapped (and maybe a few fixes here and there). |
Cool I'll take a look. Are you interested in any pull requests from me to add some functionality that my jit has that's missing here? |
I'm still a bit in the middle of development, but if I have time to integrate them yeah. What kind of thing were you missing? |
Ok, but did you want me to port my aarch64 jit to this IR, or were you wanting to do it yourself? |
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I'll leave the arm support to you 😉 |
Here you go: |
This is a WIP branch with a new JIT using an Intermediate Representation (IR) and optimized register allocation.
This will allow more easy maintain, ports to ARM or other CPUs, and better runtime performances