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10 changes: 10 additions & 0 deletions CHANGELOG.md
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# Changelog

## Unreleased

- PN-junction depletion model from Sze *Physics of Semiconductor Devices* (`PNJunctionConfig`,
`make_pn_junction_profile`): computes built-in voltage, depletion width `W` (abrupt or linearly graded), asymmetric
P/N split `x_p`/`x_n`, and capacitance `C_j = eps_s A / W`. The depletion region is represented automatically — meshed
as a dielectric strip in high-res mode when `W >= ~1/5` of the flanking doped sections, otherwise applied as a lumped
Impedance boundary via `sim.set_pn_junction()`. The 2D TWMZM demo now illustrates both modes.
- Fix: `build_doped_cross_section()` now registers doping/rib materials on `stack.materials`; previously doped domains
silently resolved to eps=1.0 without conductivity in generated Palace configs.

## 0.1.0

- Electrostatic simulation end-to-end for Palace ([#146](https://github.com/gdsfactory/gsim/pull/146))
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8 changes: 3 additions & 5 deletions README.md
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pip install gsim
```

For local Palace execution on Linux x86_64, install the optional prebuilt binary separately:

```bash
pip install "palacetoolkit-palace-cpu @ https://github.com/EpsilonForge/PalaceToolkit/releases/download/palace-cpu-v0.1.2/palacetoolkit_palace_cpu-0.1.0-py3-none-linux_x86_64.whl"
```
For local Palace execution on Linux x86_64, gsim can auto-download and cache a prebuilt Palace CPU binary on first use.
No additional package installation is required. If you prefer to supply a binary yourself, set `PALACE_BIN` (path to an
executable) or put `palace` on your `PATH`; a Palace SIF image may be given via `PALACE_SIF` for Apptainer-based runs.

For development (requires [uv](https://docs.astral.sh/uv/)):

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32 changes: 32 additions & 0 deletions docs/api/common.md
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inherited_members: false
members: false

## PN Junction

Depletion model after Sze & Ng, *Physics of Semiconductor Devices*, ch. 2.

::: gsim.common.stack.PNJunctionConfig
options:
show_source: false

::: gsim.common.stack.make_pn_junction_profile
options:
show_source: false

::: gsim.common.stack.built_in_voltage
options:
show_source: false

::: gsim.common.stack.depletion_width
options:
show_source: false

::: gsim.common.stack.depletion_extents
options:
show_source: false

::: gsim.common.stack.junction_capacitance_per_area
options:
show_source: false

::: gsim.common.stack.select_junction_mode
options:
show_source: false

## Visualization

::: gsim.common.viz.plot_prisms_3d
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