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2 changes: 2 additions & 0 deletions .git-blame-ignore-revs
Original file line number Diff line number Diff line change
@@ -0,0 +1,2 @@
# Scala Steward: Reformat with scalafmt 3.11.2
90735c8649b6785127d12ad2dab1e2eeb1b13923
2 changes: 1 addition & 1 deletion .scalafmt.conf
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
version = 3.11.1
version = 3.11.2
runner.dialect = scala3

maxColumn = 100
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -28,25 +28,26 @@ case object ConnectUnused extends HierarchyStage:
case designInst: DFDesignInst =>
val design = designInst.getDesignBlock
val subDB = rootDB.subDBs(design.ownerRef)
val unusedPorts = subDB.atGetSet { // getSet must be the outer flat-DB getSet for ref resolution to work
subDB.members.view
.collect {
case port: DFVal.Dcl if port.isPort => port
}.filter {
_.meta.annotations.exists {
case _: annotation.Unused => true
case _ => false
}
}.toList
}
val unusedPorts =
subDB.atGetSet { // getSet must be the outer flat-DB getSet for ref resolution to work
subDB.members.view
.collect {
case port: DFVal.Dcl if port.isPort => port
}.filter {
_.meta.annotations.exists {
case _: annotation.Unused => true
case _ => false
}
}.toList
}
if (unusedPorts.nonEmpty)
val dsn = new MetaDesign(designInst, Patch.Add.Config.After):
for (unusedPort <- unusedPorts) do
val pbns = dfhdl.core.DFVal.PortByNameSelect(
unusedPort.dfType,
unusedPort.modifier.dir,
designInst,
subDB.atGetSet{unusedPort.getRelativeName(design)}
subDB.atGetSet { unusedPort.getRelativeName(design) }
).asDclAny
pbns <> OPEN
Some(dsn.patch)
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -278,7 +278,7 @@ class ExplicitNamedVarsSpec extends StageSpec:
// shifted ^ o
// else shifted
// o <> anon.as(AESByte)
// end xtime
// end xtime

// val top = (new xtime).explicitNamedVars
// assertCodeString(
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -39,6 +39,7 @@ class ReduplicateDesignSpec extends StageSpec:
dup_b.y <> out_b
dup_c.x <> in_c
dup_c.y <> out_c
end Top

val id = (new Top).reduplicateNamedDup
assertCodeString(
Expand Down Expand Up @@ -98,12 +99,13 @@ class ReduplicateDesignSpec extends StageSpec:
val a = Inner()
val dup_b = Inner()
val c = Inner()
a.x <> in_a
a.y <> out_a
a.x <> in_a
a.y <> out_a
dup_b.x <> in_b
dup_b.y <> out_b
c.x <> in_c
c.y <> out_c
c.x <> in_c
c.y <> out_c
end Top

val id = (new Top).reduplicateNamedDup
assertCodeString(
Expand Down
6 changes: 2 additions & 4 deletions core/src/main/scala/dfhdl/core/DFEnum.scala
Original file line number Diff line number Diff line change
Expand Up @@ -19,13 +19,11 @@ object DFEncoding:
abstract class Default extends StartAt(0)

abstract class Gray extends Auto:
final def calcWidth(entryCount: Int): Int =
(entryCount - 1).bitsWidth(false)
final def calcWidth(entryCount: Int): Int = (entryCount - 1).bitsWidth(false)
final def encode(idx: Int): BigInt = BigInt(idx ^ (idx >>> 1))

abstract class StartAt[V <: Int & Singleton](value: V) extends Auto:
final def calcWidth(entryCount: Int): Int =
(entryCount - 1 + value).bitsWidth(false)
final def calcWidth(entryCount: Int): Int = (entryCount - 1 + value).bitsWidth(false)
final def encode(idx: Int): BigInt = BigInt(idx + value)

abstract class OneHot extends Auto:
Expand Down
1 change: 1 addition & 0 deletions core/src/main/scala/dfhdl/core/DFIf.scala
Original file line number Diff line number Diff line change
Expand Up @@ -166,6 +166,7 @@ object DFIf:
dfc.logEvent(err)
err.asVal[DFTypeAny, ModifierAny].asInstanceOf[R]
end if
end match
catch case e: DFError => DFVal(DFError.Derived(e)).asInstanceOf[R]
end fromBranches

Expand Down
18 changes: 11 additions & 7 deletions core/src/main/scala/dfhdl/core/SimplifyFunc.scala
Original file line number Diff line number Diff line change
Expand Up @@ -16,12 +16,12 @@ private object SimplifyFunc:
// TODO: maybe drop this limitation, if we can make DropStructsVecs work in
// global context.
case _ if dfc.ownerOption.isEmpty => None
case NegateDecimalConst(v) => Some(v)
case IdentityOps(v) => Some(v)
case SelfCancelling(v) => Some(v)
case MaxMinWithOffset(v) => Some(v)
case AdditiveCancellation(v) => Some(v)
case _ => None
case NegateDecimalConst(v) => Some(v)
case IdentityOps(v) => Some(v)
case SelfCancelling(v) => Some(v)
case MaxMinWithOffset(v) => Some(v)
case AdditiveCancellation(v) => Some(v)
case _ => None

// Checks if an intermediate Func can be merged into the current one.
// + and * are only merged when the intermediate has the same dfType (non-carry).
Expand Down Expand Up @@ -180,6 +180,7 @@ private object SimplifyFunc:
getSet.remove(absorbable)
Some(func)
case _ => None
end match
end unapply
end MergeAssocFunc

Expand All @@ -203,6 +204,7 @@ private object SimplifyFunc:
)
)
case _ => None
end match
end unapply
end NegateDecimalConst

Expand Down Expand Up @@ -230,6 +232,7 @@ private object SimplifyFunc:
dfc.mutableDB.setMember(c, _.copy(meta = dfc.getMeta))
)
case _ => None
end match
end unapply
end IdentityOps

Expand Down Expand Up @@ -277,7 +280,7 @@ private object SimplifyFunc:
offsetFromBase(b, a) match
case Some(c) if c > 0 => Some(pick(b, a))
case Some(c) if c < 0 => Some(pick(a, b))
case _ =>
case _ =>
// a = b + c
offsetFromBase(a, b) match
case Some(c) if c > 0 => Some(pick(a, b))
Expand Down Expand Up @@ -327,6 +330,7 @@ private object SimplifyFunc:
val remaining = indexed.collect { case (term, k) if k != i && k != j => term }
rebuildChain(remaining)
}
end if
case _ => None
end match
end unapply
Expand Down
6 changes: 5 additions & 1 deletion core/src/main/scala/dfhdl/hw/annotation.scala
Original file line number Diff line number Diff line change
Expand Up @@ -103,7 +103,10 @@ object constraints:
) extends GlobalConstraint:
val asIR: ir.constraints.DeviceConfig =
ir.constraints.DeviceConfig(
flashPartName, interface(deviceConfig.interface), sizeLimitMb, masterRate
flashPartName,
interface(deviceConfig.interface),
sizeLimitMb,
masterRate
)
object deviceConfig:
import ir.constraints.DeviceConfig.Interface
Expand Down Expand Up @@ -163,6 +166,7 @@ object constraints:
import ir.constraints.IO.PullMode
export PullMode.UP as up
export PullMode.DOWN as down
end io

object timing:
type InclusionPolicy = ir.ClkRstInclusionPolicy
Expand Down
6 changes: 3 additions & 3 deletions core/src/test/scala/CoreSpec/DFMatchSpec.scala
Original file line number Diff line number Diff line change
Expand Up @@ -178,10 +178,10 @@ class DFMatchSpec extends DFSpec:
test("Trivial tuple match skip") {
import dfhdl.hw.flag.scalaRanges
assertCodeString("") {
val (ret, _) =
(0 until 8).foldLeft[(Byte <> VAL, Byte <> VAL)]((all(0), all(0))) { case ((p, a), _) =>
val (ret, _) = (0 until 8).foldLeft[(Byte <> VAL, Byte <> VAL)]((all(0), all(0))) {
case ((p, a), _) =>
(p, a)
}
}
}
}

Expand Down
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
version = 3.11.1
version = 3.11.2
runner.dialect = scala3

maxColumn = 100
Expand Down
4 changes: 2 additions & 2 deletions internals/src/main/scala/dfhdl/internals/Checked.scala
Original file line number Diff line number Diff line change
Expand Up @@ -57,9 +57,9 @@ private class MacroClass[Q <: Quotes](using val quotes: Q)(
case "S" =>
'{ ${ arg0.asExprOf[Int] } + 1 }
case "!" =>
'{ !${ arg0.asExprOf[Boolean] } }
'{ ! ${ arg0.asExprOf[Boolean] } }
case "Negate" =>
'{ -${ arg0.asExprOf[Int] } }
'{ - ${ arg0.asExprOf[Int] } }
case "ITE" => // if-then-else
'{
if (${ arg0.asExprOf[Boolean] }) ${ arg1.asExpr } else ${ arg2.asExpr }
Expand Down
2 changes: 1 addition & 1 deletion internals/src/main/scala/dfhdl/internals/helpers.scala
Original file line number Diff line number Diff line change
Expand Up @@ -491,7 +491,7 @@ object AnnotatedWith:
// alive so the annotation's downstream implicits (option defaults, etc.) can
// still resolve at the broadest bound β€” callers that depend on a specific Out
// will surface the mismatch later.
case None => '{ annotWith[T, UB, UB] }
case None => '{ annotWith[T, UB, UB] }
end annotWithMacro
end AnnotatedWith

Expand Down
5 changes: 4 additions & 1 deletion lib/src/main/scala/dfhdl/tools/toolsCore/Tool.scala
Original file line number Diff line number Diff line change
Expand Up @@ -213,7 +213,10 @@ trait Tool:
// killing only the direct child (`gw_sh`, `vsim` -> `vsimk`, ...) leaves the real workers
// running, hence the descendants walk. Best-effort and idempotent: safe to call repeatedly.
def destroyToolTree(): Unit =
try process.wrapped.toHandle.descendants().forEach(p => { p.destroyForcibly(); () })
try
process.wrapped.toHandle.descendants().forEach(p =>
p.destroyForcibly(); ()
)
catch case _: Throwable => ()
process.wrapped.destroyForcibly()

Expand Down
4 changes: 3 additions & 1 deletion plugin/src/main/scala/plugin/FlattenInlinedPhase.scala
Original file line number Diff line number Diff line change
Expand Up @@ -39,7 +39,9 @@ class FlattenInlinedPhase(setting: Setting) extends PluginPhase:
val topLevelCls = callSym.topLevelClass
if !topLevelCls.exists then call
else if callSym.is(Macro) then
ref(topLevelCls.owner).select(topLevelCls.name)(using ctx.withOwner(topLevelCls.owner)).withSpan(call.span)
ref(topLevelCls.owner).select(topLevelCls.name)(using
ctx.withOwner(topLevelCls.owner)
).withSpan(call.span)
else
Ident(topLevelCls.typeRef).withSpan(call.span)

Expand Down
5 changes: 3 additions & 2 deletions plugin/src/main/scala/plugin/PreTyperPhase.scala
Original file line number Diff line number Diff line change
Expand Up @@ -45,8 +45,8 @@ end CustomReporter
* - auto-add `@top` annotation to concrete classes that look like DFHDL designs (extend
* EDDesign/RTDesign/DFDesign, have `type <> CONST` parameters, or use `<>` in their body),
* provided `import dfhdl.*` is in lexical scope and no `@top` annotation is already present.
* Classes extending `Interface` are excluded, since they are never entry points and
* must not receive `@top`.
* Classes extending `Interface` are excluded, since they are never entry points and must not
* receive `@top`.
*/
class PreTyperPhase(setting: Setting) extends CommonPhase:
import untpd.*
Expand Down Expand Up @@ -246,6 +246,7 @@ class PreTyperPhase(setting: Setting) extends CommonPhase:
(hasDesignParent(tmpl.parents) ||
hasConstParam(tmpl.constr.paramss) ||
bodyUsesConnect(tmpl.body))
end shouldAddTop

private inline def withScope[A](stats: List[Tree])(body: => A): A =
val prev = dfhdlImported
Expand Down
1 change: 1 addition & 0 deletions plugin/src/main/scala/plugin/TopAnnotPhase.scala
Original file line number Diff line number Diff line change
Expand Up @@ -366,4 +366,5 @@ class TopAnnotPhase(setting: Setting) extends CommonPhase:
defaultsSIntSym = requiredMethod("dfhdl.core.r__For_Plugin.defaults.sint")
emptyNoEODFCSym = requiredMethod("dfhdl.core.DFC.emptyNoEO")
ctx
end prepareForUnit
end TopAnnotPhase
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