v0.20.0#406

Merged

soronpo merged 73 commits into

mainfrom

Jun 18, 2026

Commits on Jun 7, 2026

add fork-join support, local blocks via `locally`, and `DropForkJoins` and `DropLocalBlocks` stages for backend dialects that do not support these constructs
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fix flaky iverilog execution
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update to Scala 3.8.4 and munit update
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Commits on Jun 8, 2026

add support for RT process fork-join-all, and disable lowering of fork-join-any, since dynamic span logic is currently not supported
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minimize references to process.forever
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Commits on Jun 9, 2026

prepare for Scala 3.9.0
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improve error positioning and messaging in more nested error cases
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add checks for error positioning
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Commits on Jun 10, 2026

fix runtime positions
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Commits on Jun 13, 2026

Migrate RT clk/rst domain analyses and 3 stages to hierarchical DB

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Add hierarchical new_magnetConnectionMap (cross-design magnet matching)

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Migrate magnet stages off the flat DB

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Remove the rebindGetSet knob from HierarchyStage

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Migrate DropTimedRTWaits off flat resolvedClkRstMap; drop dead isDependentOn

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Split DB.check into representation-aware subDBCheck + rootDBCheck

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Add hierarchical new_circularDerivedDomainsCheck (Step 2b)

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Add hierarchical new_domainClkRateCheck (Step 2b)

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Add hierarchical new_waitCheck (Step 2b)

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Add hierarchical new_portLocationCheck + new_portResourceDirCheck (Step 2b)

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Add hierarchical new_checkDanglingPorts (Step 2b complete)

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Run the hierarchical rootDBCheck on the root; flip call sites (Step 2c)

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Delete dead flat SanityCheck methods (Step 3a)

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Remove the flat<->hierarchical equivalence gate (Step 3b)

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Merge resolvedClkRstMap; delete the flat clk/rst analysis chain (Step 3c)

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Drop the new_ prefix from the hierarchical analyses (Step 3d)

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Delete the flat MagnetMap.get; rename getHierarchical->get (Step 3d)

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Polish now-self-referential analysis/check comments (Step 3d)

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Build oldToNew once per SanityCheck call (Step 3e)

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Run SanityCheck structural checks per sub-DB

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Make PrintCodeString a BundleStage and the printers hierarchical-DB capable

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Commits on Jun 14, 2026

migrate DropDesignDefs to GlobalStage

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migrate DropStructsVecs to GlobalStage

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migrate LocalToDesignParams to HierarchyStage

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fix iverilog crash in version scan
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migrate UniqueNames to GlobalStage

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migrate UniqueDesigns to GlobalStage + actually share duplicates

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remove DuplicateTag reference in NVC producedFiles

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disable caching in FullCompileSpec
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Unify DFDesignInst.designRef with child block ownerRef (subDBs key)

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Remove legacy DuplicateTag

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Run the stage pipeline natively on the hierarchical DB

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Replace GPVP re-normalization with a lightweight global-closure repair

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Drop the DFDesignInst.getAllRefs override; use getAllRefs in the closure repair

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Commits on Jun 15, 2026

make flat<->hierarchy DB transformations lazy and turn off infinite loop warning for "recursive" json
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Remove the unused DFInterfaceOwner skeleton

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Remove dead match branches left by DFInterfaceOwner removal

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Commits on Jun 16, 2026

Add DFInterface/DFView IR types and InstMode.Interface

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Add basic Interface frontend trait and HasConstParams

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Generalize plugin design handling to containers; keep interfaces non-top

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Collapse Interface to a single ED-based class

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Commits on Jun 17, 2026

Basic Interface frontend compiles
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Require interface ports and params to be `protected`

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change DFInterface type to have reference instead of name of the interface
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Protect against anonymous Interface class instances
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Add Interfaces user-guide chapter

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Reject init/initFile inside an Interface

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Commits on Jun 18, 2026

Document anchored-direction ports and projection terminals

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Rename projection terminal VIEW to ASIS in interfaces chapter

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Model anchored ports and view projections in the IR

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Support INOUT in views and simplify interface/view comparison

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Document INOUT anchored ports and view.inout in interfaces chapter

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Detect interface scope for init via ambient given, not modifier A

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Introduce opaque StaticRef for design-block structural keys

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Merge branch 'main' of https://github.com/DFiantHDL/DFiant into interfaces
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actuall fix DB serialization infinite loop
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add missing `into` on `StaticRef`
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prepare for Scala 3.10.x: change export of compiletime.ops.string internals
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add missing unique keyword to verilog printer
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fix Verilator tool execution regression
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make external tool Ctrl+C cancellation robust and immediate

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fix potential crash when reporting errors
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docs: temporarily hide interfaces docs
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docs: DFHDL v0.20.0 under Scala 3.8.4
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