KonaExynos

Supported Devices

• Exynos 9820
• Exynos 9825
• Exynos 9810

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What is this?

A simple Android app that lets you edit custom GPU frequency tables without recompiling the kernel.

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Origin and Attribution

KonaExynos is an Exynos-focused fork and substantial adaptation of KonaBess by xzr467706992. It retains parts of the original application architecture and the xzr.konabess package namespace.

This fork replaces the original Snapdragon-oriented workflow with support for Exynos 9810, 9820, and 9825 devices. Its changes include Exynos GPU-table parsing and editing, device-tree extraction and selection, image repacking and flashing, chipset detection, root-state handling, and an updated interface.

Copyright for code inherited from KonaBess remains with its original authors. KonaExynos and its modifications are distributed under the GNU General Public License v3.0.

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How does it work?

1. Unpacks the DTB image from your device.
2. Converts the .dtb file to a readable .dts file.
3. Lets you edit the frequency table via the app UI.
4. Re-packs and flashes the modified image back to your device.

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How to Use

1. Install the app on an Exynos 9820/9825 device.
2. Grant root (su) permissions.
3. Press Edit GPU Freq Table.
4. Select your chipset.
5. Edit the table as needed.
6. Press Save GPU Freq Table.
7. Press Repack and Flash Image.
8. Reboot and test if it works.

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What kind of improvement can I expect?

• You can under-clock for battery savings, or add new frequency steps.
• Don’t expect miracles—hardware and firmware limits still apply.

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Prebuilt Binaries

• dtc
• extract_dtb
• repack_dtb: Self-crafted binary for merging DTB parts and creating a bootable image.

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PLL table example (PLL_G3D)

[PLL NAME] : PLL_G3D
[PLL TYPE] : 14160
[NUM OF FREQUENCY] : 13
    [FREQUENCY] : 754000000  [P] : 4  [M] : 116  [S] : 0  [K] : 0
    [FREQUENCY] : 702000000  [P] : 4  [M] : 108  [S] : 0  [K] : 0
    [FREQUENCY] : 676000000  [P] : 4  [M] : 104  [S] : 0  [K] : 0
    [FREQUENCY] : 650000000  [P] : 4  [M] : 100  [S] : 0  [K] : 0
    [FREQUENCY] : 598000000  [P] : 4  [M] : 184  [S] : 1  [K] : 0
    [FREQUENCY] : 572000000  [P] : 4  [M] : 176  [S] : 1  [K] : 0
    [FREQUENCY] : 432250000  [P] : 4  [M] : 133  [S] : 1  [K] : 0
    [FREQUENCY] : 377000000  [P] : 4  [M] : 116  [S] : 1  [K] : 0
    [FREQUENCY] : 325000000  [P] : 4  [M] : 100  [S] : 1  [K] : 0
    [FREQUENCY] : 260000000  [P] : 4  [M] : 160  [S] : 2  [K] : 0
    [FREQUENCY] : 199875000  [P] : 4  [M] : 123  [S] : 2  [K] : 0
    [FREQUENCY] : 156000000  [P] : 4  [M] : 96   [S] : 2  [K] : 0
    [FREQUENCY] : 99937000   [P] : 4  [M] : 123  [S] : 3  [K] : 0

Interpreting the parameters

For K=0 (integer-N), the typical relationship is:

• VCO: Fvco = (Fref * M) / P
• Output: Fout = Fvco / (2^S)

Where:

• P = pre-divider
• M = feedback multiplier
• S = post-divider exponent (divide by 2^S)
• K = fractional part (unused here because K=0)

From the table values, the reference clock resolves cleanly to:

• Fref ≈ 26 MHz

Exynos9820 Kernel

• After extensive testing and experimentation, I came to the conclusion that the two files in the forOC folder of the https://github.com/Creeeeger/9820_kernel kernel are the ones that need to be modified in order to increase the clock speeds.