From eeca9981cd1525b5e91b418ad29b177736177532 Mon Sep 17 00:00:00 2001 From: Philipp van Kempen Date: Thu, 6 Aug 2026 13:10:59 +0200 Subject: [PATCH 1/3] m2isar/backends/etiss/instruction_generator.py: handle void args in generate_arg_str --- m2isar/backends/etiss/instruction_generator.py | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/m2isar/backends/etiss/instruction_generator.py b/m2isar/backends/etiss/instruction_generator.py index 723ef1b..ff9860d 100644 --- a/m2isar/backends/etiss/instruction_generator.py +++ b/m2isar/backends/etiss/instruction_generator.py @@ -28,9 +28,12 @@ def generate_arg_str(arg: arch.FnParam): full_type = f"{arg_type}{arg_size}" else: assert isinstance(arg.ty, type_info.PointerType) and isinstance(arg.ty.ty, type_info.PrimitiveType) - arg_type = f"{instruction_utils.data_type_map[arg.ty.ty.kind]}* " - arg_size = actual_size(arg.ty.ty.size) - full_type = f"{arg_type}{arg_size}*" + if arg.ty.ty.kind == type_info.TypeKind.VOID: + full_type = "void*" + else: + arg_type = f"{instruction_utils.data_type_map[arg.ty.ty.kind]}* " + arg_size = actual_size(arg.ty.ty.size) + full_type = f"{arg_type}{arg_size}*" return f'{full_type}{arg_name}' From 12a480eea9b3b970579d507b15538680e9844689 Mon Sep 17 00:00:00 2001 From: Philipp van Kempen Date: Thu, 6 Aug 2026 13:15:33 +0200 Subject: [PATCH 2/3] handle is_vector_reg attr also for extern mem spaces --- m2isar/frontends/coredsl2/architecture_model_builder.py | 2 ++ m2isar/metamodel/arch.py | 8 ++++++-- m2isar/metamodel/attribute_info.py | 1 + 3 files changed, 9 insertions(+), 2 deletions(-) diff --git a/m2isar/frontends/coredsl2/architecture_model_builder.py b/m2isar/frontends/coredsl2/architecture_model_builder.py index 506a13b..e1b0841 100644 --- a/m2isar/frontends/coredsl2/architecture_model_builder.py +++ b/m2isar/frontends/coredsl2/architecture_model_builder.py @@ -487,6 +487,8 @@ def visitDeclaration(self, ctx: CoreDSL2Parser.DeclarationContext): self._csr_reg_file = m elif m.is_main_mem: self.main_memory = m + elif m.is_vector_reg: + self._vector_reg_file = m self._memories[name] = m ret_decls.append(m) diff --git a/m2isar/metamodel/arch.py b/m2isar/metamodel/arch.py index e6d0291..f7c6add 100644 --- a/m2isar/metamodel/arch.py +++ b/m2isar/metamodel/arch.py @@ -381,19 +381,21 @@ def data_range(self): return RangeSpec(self.range.upper - self.range.lower, 0) - @property def is_csr_reg(self) -> bool: """Return true if this memory is tagged as being a csr register array or named CSR.""" return self._is_specific_memory(attribute_info.MemoryAttribute.IS_CSR_REG, "CSR") + @property + def is_vector_reg(self) -> bool: + """Return true if this memory is tagged as being a vector register array or named V.""" + return self._is_specific_memory(attribute_info.MemoryAttribute.IS_VECTOR_REG, "V") @property def is_main_mem(self): """Return true if this memory is tagged as being the main memory array.""" return self._is_specific_memory(attribute_info.MemoryAttribute.IS_MAIN_MEM) - def _is_specific_memory(self, memory_type: attribute_info.MemoryAttribute, expected_name: str = "") -> bool: """ This is a helper function to ensure, that all checks are performed always the same. @@ -726,6 +728,8 @@ def __init__(self, name, contributing_types: "list[str]", template: str, paramet self.main_memory = mem elif mem.is_csr_reg: self.csr_reg_file = mem + elif mem.is_vector_reg: + self.vector_reg_file = mem elif attribute_info.MemoryAttribute.ETISS_IS_GLOBAL_IRQ_EN in mem.attributes: self.global_irq_en_memory = mem elif attribute_info.MemoryAttribute.ETISS_IS_PROCNO in mem.attributes: diff --git a/m2isar/metamodel/attribute_info.py b/m2isar/metamodel/attribute_info.py index 3794b1d..99a1736 100644 --- a/m2isar/metamodel/attribute_info.py +++ b/m2isar/metamodel/attribute_info.py @@ -5,6 +5,7 @@ class MemoryAttribute(Enum): IS_MAIN_MEM = auto() IS_CSR_REG = auto() + IS_VECTOR_REG = auto() DELETE = auto() ETISS_CAN_FAIL = auto() ETISS_IS_GLOBAL_IRQ_EN = auto() From a1ea867c45efbc283e5e7820f03de8ec9eeea309 Mon Sep 17 00:00:00 2001 From: Philipp van Kempen Date: Thu, 6 Aug 2026 13:24:30 +0200 Subject: [PATCH 3/3] m2isar/backends/etiss: improve docs for --fill-mode arg --- m2isar/backends/etiss/README.md | 24 +++++++++++++++++++----- m2isar/backends/etiss/writer.py | 2 +- 2 files changed, 20 insertions(+), 6 deletions(-) diff --git a/m2isar/backends/etiss/README.md b/m2isar/backends/etiss/README.md index 3993cc1..19aa696 100644 --- a/m2isar/backends/etiss/README.md +++ b/m2isar/backends/etiss/README.md @@ -26,16 +26,30 @@ These functionalities must be implemented manually in the file `ArchS ``` $ etiss_writer --help -usage: writer.py [-h] [-s] [--log {critical,error,warning,info,debug}] top_level +usage: writer.py [-h] [--separate | --no-separate] [--static-scalars | --no-static-scalars] + [--block-end-on {none,uncond,all}] [--coverage | --no-coverage] + [--log {critical,error,warning,info,debug}] [--gdb-xml-descr GDB_XML_DESCR [GDB_XML_DESCR ...]] + [--fill-mode {auto,empty}] + top_level positional arguments: top_level A .m2isarmodel file containing the models to generate. -optional arguments: +options: -h, --help show this help message and exit - -s, --separate Generate separate .cpp files for each instruction set. - --static-scalars Enable crude static detection for scalars. WARNING: known to break! + --separate, --no-separate + Generate separate .cpp files for each instruction set. (default: True) + --static-scalars, --no-static-scalars + Enable static detection for Variables. (default: True) + --block-end-on {none,uncond,all} + Force end translation blocks on no instructions, uncoditional jumps or all jumps. + --coverage, --no-coverage + Generate coverage tracking code into model. (default: False) --log {critical,error,warning,info,debug} + --gdb-xml-descr GDB_XML_DESCR [GDB_XML_DESCR ...] + --fill-mode {auto,empty} + How to deal with generated arch-specific impl files (empty: generate placeholders, auto: + pre-populate using available metadata) ``` ## Internals @@ -54,4 +68,4 @@ def operation(self: behav.Operation, context: TransformerContext): The patching logic would perform the assignment `behav.Operation.generate = operation`. For the implementation of the patching logic, see [here](https://github.com/tum-ei-eda/M2-ISA-R/blob/coredsl2/m2isar/backends/etiss/instruction_generator.py#L14). -High-level code generation is done through `mako` templates, where large amounts of static text is required. Behavioral code is generated directly in Python through string operations. To pass state information between generation nodes, `CodeString` objects containing the actual string and supporting data are used. \ No newline at end of file +High-level code generation is done through `mako` templates, where large amounts of static text is required. Behavioral code is generated directly in Python through string operations. To pass state information between generation nodes, `CodeString` objects containing the actual string and supporting data are used. diff --git a/m2isar/backends/etiss/writer.py b/m2isar/backends/etiss/writer.py index 6557cc7..d078555 100755 --- a/m2isar/backends/etiss/writer.py +++ b/m2isar/backends/etiss/writer.py @@ -88,7 +88,7 @@ def setup(): parser.add_argument("--coverage", action=BooleanOptionalAction, default=False, help="Generate coverage tracking code into model.") parser.add_argument("--log", default="info", choices=["critical", "error", "warning", "info", "debug"]) parser.add_argument("--gdb-xml-descr", nargs="+", default=[]) - parser.add_argument("--fill-mode", choices=["auto", "empty"], default="empty") + parser.add_argument("--fill-mode", choices=["auto", "empty"], default="empty", help="How to deal with generated arch-specific impl files (empty: generate placeholders, auto: pre-populate using available metadata)") # TODO: add modes for rvv,... args = parser.parse_args()