diff --git a/.github/workflows/linux.yml b/.github/workflows/linux.yml index ce3f0acb49..662d6180ec 100644 --- a/.github/workflows/linux.yml +++ b/.github/workflows/linux.yml @@ -193,7 +193,7 @@ jobs: # Balanced with the measured build time of each group, so that the # shards finish at about the same time. group: - - smoketest-rp2xxx smoketest-selftest smoketest-wasm-sim + - smoketest-rp2xxx smoketest-selftest smoketest-wasm-sim smoketest-py32 - smoketest-esp smoketest-riscv smoketest-flags - smoketest-examples smoketest-nxp smoketest-pwm-usb smoketest-avr - smoketest-samd smoketest-stm32 smoketest-nrf smoketest-wasm diff --git a/.gitignore b/.gitignore index 2761d1fcc7..0b03c83ead 100644 --- a/.gitignore +++ b/.gitignore @@ -24,6 +24,8 @@ src/device/renesas/*.go src/device/renesas/*.s src/device/rp/*.go src/device/rp/*.s +src/device/py32/*.go +src/device/py32/*.s ./vendor llvm-build llvm-project diff --git a/.gitmodules b/.gitmodules index 5b780d67ad..44a0126ef2 100644 --- a/.gitmodules +++ b/.gitmodules @@ -41,3 +41,6 @@ [submodule "lib/bdwgc"] path = lib/bdwgc url = https://github.com/ivmai/bdwgc.git +[submodule "lib/py32-svd"] + path = lib/py32-svd + url = https://github.com/tinygo-org/py32-svd.git diff --git a/compileopts/target_test.go b/compileopts/target_test.go index 315ccf4e49..653f116fe2 100644 --- a/compileopts/target_test.go +++ b/compileopts/target_test.go @@ -1,8 +1,10 @@ package compileopts import ( + "encoding/csv" "errors" "io/fs" + "os" "reflect" "testing" ) @@ -54,6 +56,38 @@ func TestLoadTarget_InheritableOnlyTargetStillLoadable(t *testing.T) { } } +func TestLoadPY32ConcreteTargets(t *testing.T) { + file, err := os.Open("../tools/gen-py32-targets/devices.csv") + if err != nil { + t.Fatal(err) + } + defer file.Close() + + records, err := csv.NewReader(file).ReadAll() + if err != nil { + t.Fatal(err) + } + for _, record := range records[1:] { + part, core := record[0], record[2] + t.Run(part, func(t *testing.T) { + spec, err := LoadTarget(&Options{Target: part}) + if err != nil { + t.Fatal(err) + } + if spec.LinkerScript == "" { + t.Error("concrete target has no linker script") + } + wantCPU := "cortex-m0plus" + if core == "m4" { + wantCPU = "cortex-m4" + } + if spec.CPU != wantCPU { + t.Errorf("CPU is %q, want %q", spec.CPU, wantCPU) + } + }) + } +} + func TestOverrideProperties(t *testing.T) { baseAutoStackSize := true base := &TargetSpec{ diff --git a/lib/py32-svd b/lib/py32-svd new file mode 160000 index 0000000000..6aa7396c1d --- /dev/null +++ b/lib/py32-svd @@ -0,0 +1 @@ +Subproject commit 6aa7396c1d4d20be61cc62f283fa3835665c7361 diff --git a/make/gen-device.mk b/make/gen-device.mk index 25845fc5a0..9f3c5cf972 100644 --- a/make/gen-device.mk +++ b/make/gen-device.mk @@ -2,9 +2,9 @@ .PHONY: gen-device gen-device-avr gen-device-esp gen-device-nrf gen-device-sam \ gen-device-sifive gen-device-kendryte gen-device-nxp gen-device-rp \ - gen-device-stm32 gen-device-renesas + gen-device-stm32 gen-device-renesas gen-device-py32 gen-target-py32 -gen-device: gen-device-avr gen-device-esp gen-device-nrf gen-device-sam gen-device-sifive gen-device-kendryte gen-device-nxp gen-device-rp ## Generate microcontroller-specific sources +gen-device: gen-device-avr gen-device-esp gen-device-nrf gen-device-sam gen-device-sifive gen-device-kendryte gen-device-nxp gen-device-rp gen-device-py32 ## Generate microcontroller-specific sources ifneq ($(RENESAS), 0) gen-device: gen-device-renesas endif @@ -58,3 +58,10 @@ gen-device-rp: build/gen-device-svd gen-device-renesas: build/gen-device-svd ./build/gen-device-svd -source=https://github.com/cmsis-svd/cmsis-svd-data/tree/master/data/Renesas lib/cmsis-svd/data/Renesas/ src/device/renesas/ GO111MODULE=off $(GO) fmt ./src/device/renesas + +gen-device-py32: build/gen-device-svd + ./build/gen-device-svd -source=https://github.com/tinygo-org/py32-svd lib/py32-svd/svd src/device/py32/ + GO111MODULE=off $(GO) fmt ./src/device/py32 + +gen-target-py32: ## Generate PY32 target and linker definitions + $(GO) run ./tools/gen-py32-targets diff --git a/make/smoketest.mk b/make/smoketest.mk index fb97e595c7..12ecc2ad8d 100644 --- a/make/smoketest.mk +++ b/make/smoketest.mk @@ -19,6 +19,7 @@ SMOKETEST_SUBTARGETS = \ smoketest-rp2xxx \ smoketest-pwm-usb \ smoketest-stm32 \ + smoketest-py32 \ smoketest-avr \ smoketest-esp \ smoketest-riscv \ @@ -403,6 +404,37 @@ ifneq ($(STM32), 0) @$(MD5SUM) $(SMOKE_OUT).hex endif +smoketest-py32: SMOKE_OUT = build/smoke/py32 +smoketest-py32: | build/smoke +ifneq ($(PY32), 0) + $(TINYGO) build -size short -o $(SMOKE_OUT).hex -target=embedfire-py32f030 examples/blinky1 + @$(MD5SUM) $(SMOKE_OUT).hex + $(TINYGO) build -size short -o $(SMOKE_OUT).hex -target=embedfire-py32f030 examples/echo + @$(MD5SUM) $(SMOKE_OUT).hex + $(TINYGO) build -size short -o $(SMOKE_OUT).hex -target=embedfire-py32f002b examples/blinky1 + @$(MD5SUM) $(SMOKE_OUT).hex + $(TINYGO) build -size short -o $(SMOKE_OUT).hex -target=embedfire-py32f002b examples/echo + @$(MD5SUM) $(SMOKE_OUT).hex + $(TINYGO) build -size short -o $(SMOKE_OUT).hex -target=py32f002bx5 ./testdata/py32-uart + @$(MD5SUM) $(SMOKE_OUT).hex + $(TINYGO) build -size short -o $(SMOKE_OUT).hex -target=py32f003x6 ./testdata/py32-uart + @$(MD5SUM) $(SMOKE_OUT).hex + $(TINYGO) build -size short -o $(SMOKE_OUT).hex -target=py32f030x8 ./testdata/py32-uart + @$(MD5SUM) $(SMOKE_OUT).hex + $(TINYGO) build -size short -o $(SMOKE_OUT).hex -target=py32f403xb examples/echo + @$(MD5SUM) $(SMOKE_OUT).hex + $(TINYGO) build -size short -o $(SMOKE_OUT).hex -target=py32f030x8 ./testdata/py32-clock + @$(MD5SUM) $(SMOKE_OUT).hex + $(TINYGO) build -size short -o $(SMOKE_OUT).hex -target=py32f403xb ./testdata/py32-clock + @$(MD5SUM) $(SMOKE_OUT).hex + $(TINYGO) build -size short -o $(SMOKE_OUT).hex -target=py32e407xc examples/echo + @$(MD5SUM) $(SMOKE_OUT).hex + $(TINYGO) build -size short -o $(SMOKE_OUT).hex -target=py32f410xb examples/echo + @$(MD5SUM) $(SMOKE_OUT).hex + $(TINYGO) build -size short -o $(SMOKE_OUT).hex -target=py32t020x5 examples/echo + @$(MD5SUM) $(SMOKE_OUT).hex +endif + smoketest-avr: SMOKE_OUT = build/smoke/avr smoketest-avr: | build/smoke $(TINYGO) build -size short -o $(SMOKE_OUT).hex -target=atmega328pb examples/blinkm diff --git a/src/machine/board_embedfire_py32f002b.go b/src/machine/board_embedfire_py32f002b.go new file mode 100644 index 0000000000..db44fd4d62 --- /dev/null +++ b/src/machine/board_embedfire_py32f002b.go @@ -0,0 +1,28 @@ +//go:build embedfire_py32f002b + +// Pin mappings for the Embedfire PY32F002B board. + +package machine + +// LEDs +const ( + LED1 = PA1 + LED2 = PA5 + LED3 = PA4 + LED = LED2 +) + +// Buttons +const ( + KEY1 = PA3 + KEY2 = PA0 +) + +const ( + UART_TX_PIN = PA6 + UART_RX_PIN = PA7 +) + +func defaultUARTPins() (Pin, Pin) { + return UART_TX_PIN, UART_RX_PIN +} diff --git a/src/machine/board_embedfire_py32f030.go b/src/machine/board_embedfire_py32f030.go new file mode 100644 index 0000000000..73c7f94373 --- /dev/null +++ b/src/machine/board_embedfire_py32f030.go @@ -0,0 +1,28 @@ +//go:build embedfire_py32f030 + +// Pin mappings for the Embedfire PY32F030 board. + +package machine + +// LEDs +const ( + LED1 = PA2 + LED2 = PA3 + LED3 = PA4 + LED = LED2 +) + +// Buttons +const ( + KEY1 = PA5 + KEY2 = PA6 +) + +const ( + UART_TX_PIN = PA7 + UART_RX_PIN = PA8 +) + +func defaultUARTPins() (Pin, Pin) { + return UART_TX_PIN, UART_RX_PIN +} diff --git a/src/machine/machine_py32_clock.go b/src/machine/machine_py32_clock.go new file mode 100644 index 0000000000..6f8c7da65f --- /dev/null +++ b/src/machine/machine_py32_clock.go @@ -0,0 +1,13 @@ +//go:build py32 + +package machine + +var cpuFrequencyHz uint32 = defaultCPUFrequencyHz + +func CPUFrequency() uint32 { + return cpuFrequencyHz +} + +func setCPUFrequency(frequency uint32) { + cpuFrequencyHz = frequency +} diff --git a/src/machine/machine_py32_clock_24mhz.go b/src/machine/machine_py32_clock_24mhz.go new file mode 100644 index 0000000000..a1e8a072de --- /dev/null +++ b/src/machine/machine_py32_clock_24mhz.go @@ -0,0 +1,5 @@ +//go:build py32 && !py32_no_hsi_fs + +package machine + +const defaultCPUFrequencyHz = 24_000_000 diff --git a/src/machine/machine_py32_clock_8mhz.go b/src/machine/machine_py32_clock_8mhz.go new file mode 100644 index 0000000000..554e9fca8a --- /dev/null +++ b/src/machine/machine_py32_clock_8mhz.go @@ -0,0 +1,5 @@ +//go:build py32 && py32_no_hsi_fs + +package machine + +const defaultCPUFrequencyHz = 8_000_000 diff --git a/src/machine/machine_py32_pin.go b/src/machine/machine_py32_pin.go new file mode 100644 index 0000000000..ea9cd99206 --- /dev/null +++ b/src/machine/machine_py32_pin.go @@ -0,0 +1,226 @@ +//go:build py32 + +package machine + +import ( + "device/py32" + "unsafe" +) + +const deviceName = py32.Device + +// Peripheral port offsets. +// Keep the same spacing used on other MCUs so helpers like Pin.getPortNumber +// can keep using simple division by 16. +const ( + portA Pin = iota * 16 + portB + portC + portD + portE + portF +) + +const ( + PA0 Pin = portA + iota + PA1 + PA2 + PA3 + PA4 + PA5 + PA6 + PA7 + PA8 + PA9 + PA10 + PA11 + PA12 + PA13 + PA14 + PA15 +) + +const ( + PB0 Pin = portB + iota + PB1 + PB2 + PB3 + PB4 + PB5 + PB6 + PB7 + PB8 + PB9 + PB10 + PB11 + PB12 + PB13 + PB14 + PB15 +) + +const ( + PC0 Pin = portC + iota + PC1 + PC2 + PC3 + PC4 + PC5 + PC6 + PC7 + PC8 + PC9 + PC10 + PC11 + PC12 + PC13 + PC14 + PC15 +) + +const ( + PD0 Pin = portD + iota + PD1 + PD2 + PD3 + PD4 + PD5 + PD6 + PD7 + PD8 + PD9 + PD10 + PD11 + PD12 + PD13 + PD14 + PD15 +) + +const ( + PE0 Pin = portE + iota + PE1 + PE2 + PE3 + PE4 + PE5 + PE6 + PE7 + PE8 + PE9 + PE10 + PE11 + PE12 + PE13 + PE14 + PE15 +) + +const ( + PF0 Pin = portF + iota + PF1 + PF2 + PF3 + PF4 + PF5 + PF6 + PF7 + PF8 + PF9 + PF10 + PF11 + PF12 + PF13 + PF14 + PF15 +) + +const ( + PinOutput PinMode = iota + PinInput + PinInputPulldown + PinInputPullup + PinInputAnalog + PinAlternate +) + +// These unshifted encodings are shared by the supported PY32 parts. Register +// masks come from the generated device definitions. +const ( + gpioModeInput = 0 + gpioModeOutput = 1 + gpioModeAlternate = 2 + gpioModeAnalog = 3 + + gpioPullFloating = 0 + gpioPullUp = 1 + gpioPullDown = 2 + gpioPullMask = py32.GPIO_PUPDR_PUPD0_Msk + + gpioOutputSpeedLow = 0 + gpioOutputSpeedMedium = 1 + gpioOutputSpeedHigh = 2 + gpioOutputSpeedVeryHigh = 3 + + gpioOutputTypePushPull = 0 + gpioOutputTypeMask = py32.GPIO_OTYPER_OT0_Msk +) + +func (p Pin) getPortNumber() uint8 { + return uint8(p) >> 4 +} + +func (p Pin) getPinNumber() uint8 { + return uint8(p) & 0x0F +} + +func (p Pin) getPort() (*py32.GPIO_Type, uint8) { + offset := uintptr(p.getPortNumber()) * (uintptr(unsafe.Pointer(py32.GPIOB)) - uintptr(unsafe.Pointer(py32.GPIOA))) + return (*py32.GPIO_Type)(unsafe.Add(unsafe.Pointer(py32.GPIOA), offset)), p.getPinNumber() +} + +func (p Pin) Set(high bool) { + port, pin := p.getPort() + if high { + port.BSRR.Set(py32.GPIO_BSRR_BS0 << pin) + } else { + port.BSRR.Set(py32.GPIO_BSRR_BR0 << pin) + } +} + +func (p Pin) Get() bool { + port, pin := p.getPort() + val := port.IDR.Get() & (py32.GPIO_IDR_ID0 << pin) + return val > 0 +} + +func (p Pin) Configure(config PinConfig) { + p.enableClock() + port, pin := p.getPort() + pos := pin * 2 + + switch config.Mode { + + case PinInput: + port.MODER.ReplaceBits(gpioModeInput, gpioModeMask, pos) + port.PUPDR.ReplaceBits(gpioPullFloating, gpioPullMask, pos) + case PinInputPulldown: + port.MODER.ReplaceBits(gpioModeInput, gpioModeMask, pos) + port.PUPDR.ReplaceBits(gpioPullDown, gpioPullMask, pos) + case PinInputPullup: + port.MODER.ReplaceBits(gpioModeInput, gpioModeMask, pos) + port.PUPDR.ReplaceBits(gpioPullUp, gpioPullMask, pos) + case PinOutput: + port.MODER.ReplaceBits(gpioModeOutput, gpioModeMask, pos) + port.OTYPER.ReplaceBits(gpioOutputTypePushPull, gpioOutputTypeMask, pos>>1) + setPinOutputSpeed(port, gpioOutputSpeedHigh, pos) + case PinInputAnalog: + port.MODER.ReplaceBits(gpioModeAnalog, gpioModeMask, pos) + port.PUPDR.ReplaceBits(gpioPullFloating, gpioPullMask, pos) + case PinAlternate: + port.MODER.ReplaceBits(gpioModeAlternate, gpioModeMask, pos) + port.PUPDR.ReplaceBits(gpioPullFloating, gpioPullMask, pos) + port.OTYPER.ReplaceBits(gpioOutputTypePushPull, gpioOutputTypeMask, pos>>1) + setPinOutputSpeed(port, gpioOutputSpeedHigh, pos) + } +} diff --git a/src/machine/machine_py32_pin_afrh.go b/src/machine/machine_py32_pin_afrh.go new file mode 100644 index 0000000000..41a3571f77 --- /dev/null +++ b/src/machine/machine_py32_pin_afrh.go @@ -0,0 +1,17 @@ +//go:build py32 && !py32_no_gpio_afrh + +package machine + +import "device/py32" + +// SetAltFunc selects a pin-specific alternate function. +// Configure the pin as PinAlternate first; AF values are listed in the device +// datasheet and vary by pin and device. +func (p Pin) SetAltFunc(af uint8) { + port, pin := p.getPort() + if pin >= 8 { + port.AFRH.ReplaceBits(uint32(af), py32.GPIO_AFRL_AFSEL0_Msk, (pin%8)*4) + } else { + port.AFRL.ReplaceBits(uint32(af), py32.GPIO_AFRL_AFSEL0_Msk, (pin%8)*4) + } +} diff --git a/src/machine/machine_py32_pin_clock.go b/src/machine/machine_py32_pin_clock.go new file mode 100644 index 0000000000..e5c575f60f --- /dev/null +++ b/src/machine/machine_py32_pin_clock.go @@ -0,0 +1,9 @@ +//go:build py32 && !py32_gpio_clock_ahb2 && !py32_gpio_clock_ahb + +package machine + +import "device/py32" + +func (p Pin) enableClock() { + py32.RCC.IOPENR.SetBits(py32.RCC_IOPENR_GPIOAEN << p.getPortNumber()) +} diff --git a/src/machine/machine_py32_pin_clock_ahb.go b/src/machine/machine_py32_pin_clock_ahb.go new file mode 100644 index 0000000000..6ac7e62d8e --- /dev/null +++ b/src/machine/machine_py32_pin_clock_ahb.go @@ -0,0 +1,9 @@ +//go:build py32 && py32_gpio_clock_ahb + +package machine + +import "device/py32" + +func (p Pin) enableClock() { + py32.RCC.AHBENR.SetBits(py32.RCC_AHBENR_IOPAEN << p.getPortNumber()) +} diff --git a/src/machine/machine_py32_pin_clock_ahb2.go b/src/machine/machine_py32_pin_clock_ahb2.go new file mode 100644 index 0000000000..3daf2728c6 --- /dev/null +++ b/src/machine/machine_py32_pin_clock_ahb2.go @@ -0,0 +1,9 @@ +//go:build py32 && py32_gpio_clock_ahb2 + +package machine + +import "device/py32" + +func (p Pin) enableClock() { + py32.RCC.AHB2ENR.SetBits(py32.RCC_AHB2ENR_IOPAEN << p.getPortNumber()) +} diff --git a/src/machine/machine_py32_pin_no_afrh.go b/src/machine/machine_py32_pin_no_afrh.go new file mode 100644 index 0000000000..973e4c8b56 --- /dev/null +++ b/src/machine/machine_py32_pin_no_afrh.go @@ -0,0 +1,13 @@ +//go:build py32 && py32_no_gpio_afrh + +package machine + +import "device/py32" + +// SetAltFunc selects a pin-specific alternate function. +// Configure the pin as PinAlternate first; AF values are listed in the device +// datasheet and vary by pin and device. +func (p Pin) SetAltFunc(af uint8) { + port, pin := p.getPort() + port.AFRL.ReplaceBits(uint32(af), py32.GPIO_AFRL_AFSEL0_Msk, (pin%8)*4) +} diff --git a/src/machine/machine_py32_pin_speed.go b/src/machine/machine_py32_pin_speed.go new file mode 100644 index 0000000000..45addbb766 --- /dev/null +++ b/src/machine/machine_py32_pin_speed.go @@ -0,0 +1,14 @@ +//go:build py32 && !py32_gpio_ospdder + +package machine + +import "device/py32" + +const ( + gpioModeMask = py32.GPIO_MODER_MODE0_Msk + gpioOutputSpeedMask = py32.GPIO_OSPEEDR_OSPEED0_Msk +) + +func setPinOutputSpeed(port *py32.GPIO_Type, speed uint32, pos uint8) { + port.OSPEEDR.ReplaceBits(speed, gpioOutputSpeedMask, pos) +} diff --git a/src/machine/machine_py32_pin_speed_ospdder.go b/src/machine/machine_py32_pin_speed_ospdder.go new file mode 100644 index 0000000000..99409ed2ec --- /dev/null +++ b/src/machine/machine_py32_pin_speed_ospdder.go @@ -0,0 +1,14 @@ +//go:build py32 && py32_gpio_ospdder + +package machine + +import "device/py32" + +const ( + gpioModeMask = py32.GPIO_MODER_MODER0_Msk + gpioOutputSpeedMask = py32.GPIO_OSPDDER_OSPEED0_Msk +) + +func setPinOutputSpeed(port *py32.GPIO_Type, speed uint32, pos uint8) { + port.OSPDDER.ReplaceBits(speed, gpioOutputSpeedMask, pos) +} diff --git a/src/machine/machine_py32_uart.go b/src/machine/machine_py32_uart.go new file mode 100644 index 0000000000..3d358cd7cf --- /dev/null +++ b/src/machine/machine_py32_uart.go @@ -0,0 +1,94 @@ +//go:build py32 && !py32_uart_type + +package machine + +import ( + "device/py32" + "runtime/interrupt" +) + +// UART implements a minimal USART driver for PY32 parts. It works with any of +// the on-chip USART peripherals: the peripheral-specific wiring (clock gate and +// RX interrupt) is provided by the setup function stored on the instance, which +// is set when the instance is created (see setupUSART1 / setupUSART2). +type UART struct { + Bus *py32.USART_Type + Buffer *RingBuffer + irq interrupt.Interrupt + setup func(*UART) + txRetries uint32 + num uint8 +} + +// DefaultUART is the first USART (USART1) and backs machine.Serial. +var DefaultUART = &UART{Bus: defaultUSART(), Buffer: NewRingBuffer(), setup: setupUSART1, num: 1} + +func (uart *UART) Configure(config UARTConfig) error { + + if config.BaudRate == 0 { + config.BaudRate = 115200 + } + uart.txRetries = uartTXRetryBudget(config.BaudRate) + if err := configureUARTPins(uart.num, config); err != nil { + return err + } + + // Enable the peripheral clock and hook its RX interrupt. + uart.setup(uart) + + // Reset control registers to a known state. + uart.Bus.CR1.Set(0) + uart.Bus.CR2.Set(0) + uart.Bus.CR3.Set(0) + + clockHz := CPUFrequency() + + // Oversampling by 16: BRR expects fck/baud. + divider := (clockHz + (config.BaudRate / 2)) / config.BaudRate + uart.Bus.BRR.Set(divider) + + // Enable transmitter, receiver, RX interrupt, and the peripheral. + uart.Bus.CR1.Set(py32.USART_CR1_TE | py32.USART_CR1_RE | py32.USART_CR1_RXNEIE | py32.USART_CR1_UE) + + return nil +} + +// setupUSART1 enables the USART1 peripheral clock and installs its RX interrupt +// handler. It records the instance in usart1RX so the handler can reach it +// without the var initializer forming an initialization cycle. +func setupUSART1(uart *UART) { + usart1RX = uart + enableUSART1Clock() + configureUSART1Interrupt(uart) +} + +func handleUSART1Interrupt(interrupt.Interrupt) { + usart1RX.Receive(uint8(readUSARTData(usart1RX.Bus))) +} + +// usart1RX is the UART whose RX interrupt is serviced by handleUSART1Interrupt. +// It is set by setupUSART1 at Configure time; keeping it as a plain package var +// (rather than referencing DefaultUART from the handler) avoids an +// initialization cycle so DefaultUART.setup can be set in its var initializer. +var usart1RX *UART + +func (uart *UART) writeByte(c byte) error { + retries := uart.txRetries + for retries > 0 && !usartTXReady(uart.Bus) { + uartYield() + retries-- + } + if retries <= 0 { + return errUARTWriteTimeout + } + writeUSARTData(uart.Bus, uint32(c)) + return nil +} + +func (uart *UART) flush() { + retries := uart.txRetries + for retries > 0 && !usartTXComplete(uart.Bus) { + uartYield() + retries-- + } +} diff --git a/src/machine/machine_py32_uart2.go b/src/machine/machine_py32_uart2.go new file mode 100644 index 0000000000..388f8399c5 --- /dev/null +++ b/src/machine/machine_py32_uart2.go @@ -0,0 +1,30 @@ +//go:build py32 && (py32f003xx || py32f030xx || py32f040xx) + +package machine + +import ( + "device/py32" + "runtime/interrupt" +) + +// UART2 is the second USART (USART2), available on PY32 parts that provide it. +// It shares the generic UART driver; its clock gate and interrupt are wired up +// by setupUSART2. +var UART2 = &UART{Bus: py32.USART2, Buffer: NewRingBuffer(), setup: setupUSART2, num: 2} + +// setupUSART2 enables the USART2 peripheral clock and installs its RX interrupt +// handler. +func setupUSART2(uart *UART) { + usart2RX = uart + py32.RCC.APBENR1.SetBits(py32.RCC_APBENR1_USART2EN) + uart.irq = interrupt.New(py32.IRQ_USART2, handleUSART2Interrupt) + uart.irq.SetPriority(0xc0) + uart.irq.Enable() +} + +func handleUSART2Interrupt(interrupt.Interrupt) { + usart2RX.Receive(uint8(readUSARTData(usart2RX.Bus))) +} + +// usart2RX is the UART serviced by handleUSART2Interrupt, set by setupUSART2. +var usart2RX *UART diff --git a/src/machine/machine_py32_uart_clock.go b/src/machine/machine_py32_uart_clock.go new file mode 100644 index 0000000000..3f066a2bd7 --- /dev/null +++ b/src/machine/machine_py32_uart_clock.go @@ -0,0 +1,9 @@ +//go:build py32 && !py32_uart_type && !py32_uart_clock_apb2 && !py32_usart1_clock_literal + +package machine + +import "device/py32" + +func enableUSART1Clock() { + py32.RCC.APBENR2.SetBits(py32.RCC_APBENR2_USART1EN) +} diff --git a/src/machine/machine_py32_uart_clock_apb2.go b/src/machine/machine_py32_uart_clock_apb2.go new file mode 100644 index 0000000000..4eeb94429a --- /dev/null +++ b/src/machine/machine_py32_uart_clock_apb2.go @@ -0,0 +1,9 @@ +//go:build py32 && !py32_uart_type && py32_uart_clock_apb2 + +package machine + +import "device/py32" + +func enableUSART1Clock() { + py32.RCC.APB2ENR.SetBits(py32.RCC_APB2ENR_USART1EN) +} diff --git a/src/machine/machine_py32_uart_clock_literal.go b/src/machine/machine_py32_uart_clock_literal.go new file mode 100644 index 0000000000..dd82965783 --- /dev/null +++ b/src/machine/machine_py32_uart_clock_literal.go @@ -0,0 +1,10 @@ +//go:build py32 && !py32_uart_type && !py32_uart_clock_apb2 && py32_usart1_clock_literal + +package machine + +import "device/py32" + +func enableUSART1Clock() { + // The F001 SVDs omit USART1EN; the vendor register layout places it at bit 14. + py32.RCC.APBENR2.SetBits(1 << 14) +} diff --git a/src/machine/machine_py32_uart_common.go b/src/machine/machine_py32_uart_common.go new file mode 100644 index 0000000000..461f020b92 --- /dev/null +++ b/src/machine/machine_py32_uart_common.go @@ -0,0 +1,58 @@ +//go:build py32 + +package machine + +import "runtime/interrupt" + +type uartError string + +func (e uartError) Error() string { return string(e) } + +// errUARTWriteTimeout is returned when the transmit register stays busy. +const errUARTWriteTimeout uartError = "UART: write timeout" + +const ( + errUARTInvalidTXPin uartError = "UART: invalid TX pin" + errUARTInvalidRXPin uartError = "UART: invalid RX pin" + errUARTPinsEqual uartError = "UART: TX and RX pins must differ" +) + +func configureUARTPins(uartNum uint8, config UARTConfig) error { + if config.TX == 0 && config.RX == 0 { + config.TX, config.RX = defaultUARTPins() + } + if config.TX == config.RX && config.TX != NoPin { + return errUARTPinsEqual + } + if config.TX != NoPin { + af, ok := uartPinAF(uartNum, config.TX, true) + if !ok { + return errUARTInvalidTXPin + } + config.TX.Configure(PinConfig{Mode: PinAlternate}) + config.TX.SetAltFunc(af) + } + if config.RX != NoPin { + af, ok := uartPinAF(uartNum, config.RX, false) + if !ok { + return errUARTInvalidRXPin + } + config.RX.Configure(PinConfig{Mode: PinAlternate}) + config.RX.SetAltFunc(af) + } + return nil +} + +func uartTXRetryBudget(baudRate uint32) uint32 { + retries := CPUFrequency() / baudRate * 10 + if retries < 10 { + return 10 + } + return retries +} + +func uartYield() { + if !interrupt.In() { + gosched() + } +} diff --git a/src/machine/machine_py32_uart_data.go b/src/machine/machine_py32_uart_data.go new file mode 100644 index 0000000000..3345e57700 --- /dev/null +++ b/src/machine/machine_py32_uart_data.go @@ -0,0 +1,22 @@ +//go:build py32 && !py32_uart_type && !py32_usart_split_data + +package machine + +import "device/py32" + +func readUSARTData(bus *py32.USART_Type) uint32 { + return bus.DR.Get() +} + +func writeUSARTData(bus *py32.USART_Type, value uint32) { + bus.DR.Set(value) +} + +func usartTXReady(bus *py32.USART_Type) bool { + const txEmpty = 1 << 7 // TXE or TXE_TXFNF, depending on the family. + return bus.SR.Get()&txEmpty != 0 +} + +func usartTXComplete(bus *py32.USART_Type) bool { + return bus.SR.Get()&py32.USART_SR_TC != 0 +} diff --git a/src/machine/machine_py32_uart_data_split.go b/src/machine/machine_py32_uart_data_split.go new file mode 100644 index 0000000000..11017dabba --- /dev/null +++ b/src/machine/machine_py32_uart_data_split.go @@ -0,0 +1,21 @@ +//go:build py32 && py32_usart_split_data + +package machine + +import "device/py32" + +func readUSARTData(bus *py32.USART_Type) uint32 { + return bus.RDR.Get() +} + +func writeUSARTData(bus *py32.USART_Type, value uint32) { + bus.TDR.Set(value) +} + +func usartTXReady(bus *py32.USART_Type) bool { + return bus.SR.Get()&py32.USART_SR_TXE_TXFNF != 0 +} + +func usartTXComplete(bus *py32.USART_Type) bool { + return bus.SR.Get()&py32.USART_SR_TC != 0 +} diff --git a/src/machine/machine_py32_uart_interrupt.go b/src/machine/machine_py32_uart_interrupt.go new file mode 100644 index 0000000000..c543450c31 --- /dev/null +++ b/src/machine/machine_py32_uart_interrupt.go @@ -0,0 +1,14 @@ +//go:build py32 && !py32_uart_type && !py32_uart_no_interrupt + +package machine + +import ( + "device/py32" + "runtime/interrupt" +) + +func configureUSART1Interrupt(uart *UART) { + uart.irq = interrupt.New(py32.IRQ_USART1, handleUSART1Interrupt) + uart.irq.SetPriority(0xc0) + uart.irq.Enable() +} diff --git a/src/machine/machine_py32_uart_no_default_pins.go b/src/machine/machine_py32_uart_no_default_pins.go new file mode 100644 index 0000000000..6ca8735b30 --- /dev/null +++ b/src/machine/machine_py32_uart_no_default_pins.go @@ -0,0 +1,7 @@ +//go:build py32 && !py32_default_uart_pins + +package machine + +func defaultUARTPins() (Pin, Pin) { + return NoPin, NoPin +} diff --git a/src/machine/machine_py32_uart_no_interrupt.go b/src/machine/machine_py32_uart_no_interrupt.go new file mode 100644 index 0000000000..bcf11bc9bc --- /dev/null +++ b/src/machine/machine_py32_uart_no_interrupt.go @@ -0,0 +1,8 @@ +//go:build py32 && !py32_uart_type && py32_uart_no_interrupt + +package machine + +// The F410 SVD does not provide USART interrupt metadata. Keep transmit and +// configuration support without inventing an IRQ number. +func configureUSART1Interrupt(uart *UART) { +} diff --git a/src/machine/machine_py32_uart_pinmap_f002b.go b/src/machine/machine_py32_uart_pinmap_f002b.go new file mode 100644 index 0000000000..7971b88df1 --- /dev/null +++ b/src/machine/machine_py32_uart_pinmap_f002b.go @@ -0,0 +1,24 @@ +//go:build py32 && py32f002bxx + +package machine + +// PY32F002B datasheet tables 3-4 and 3-5. +func uartPinAF(uartNum uint8, pin Pin, tx bool) (uint8, bool) { + if uartNum != 1 { + return 0, false + } + if tx { + switch pin { + case PA3, PA6, PA7, PB4, PB6: + return 1, true + } + } else { + switch pin { + case PA2, PA4, PB5: + return 1, true + case PA7: + return 3, true + } + } + return 0, false +} diff --git a/src/machine/machine_py32_uart_pinmap_f003_f030.go b/src/machine/machine_py32_uart_pinmap_f003_f030.go new file mode 100644 index 0000000000..5fb41f7916 --- /dev/null +++ b/src/machine/machine_py32_uart_pinmap_f003_f030.go @@ -0,0 +1,49 @@ +//go:build py32 && (py32f003xx || py32f030xx) + +package machine + +// PY32F003 datasheet tables 3-6 through 3-8 and PY32F030 datasheet +// tables 3-1 through 3-3. +func uartPinAF(uartNum uint8, pin Pin, tx bool) (uint8, bool) { + switch uartNum { + case 1: + if tx { + switch pin { + case PB6, PF3: + return 0, true + case PA2, PA9, PA14: + return 1, true + case PA7, PA10, PB8, PF1: + return 8, true + } + } else { + switch pin { + case PB2, PB7: + return 0, true + case PA3, PA10, PA15: + return 1, true + case PA8, PA9, PA13, PF0: + return 8, true + } + } + case 2: + if tx { + switch pin { + case PA2, PA9, PA14, PB6, PB8, PF1, PF3: + return 4, true + case PA0, PA4, PA7, PF0: + return 9, true + } + } else { + switch pin { + case PB2: + return 3, true + case PA3, PA10, PA15, PB7, PF0, PF2: + return 4, true + case PA1, PA5, PA8, PF1: + return 9, true + } + } + } + return 0, false +} diff --git a/src/machine/machine_py32_uart_pinmap_none.go b/src/machine/machine_py32_uart_pinmap_none.go new file mode 100644 index 0000000000..ce2633ec4c --- /dev/null +++ b/src/machine/machine_py32_uart_pinmap_none.go @@ -0,0 +1,7 @@ +//go:build py32 && !py32f002bxx && !py32f003xx && !py32f030xx + +package machine + +func uartPinAF(uartNum uint8, pin Pin, tx bool) (uint8, bool) { + return 0, false +} diff --git a/src/machine/machine_py32_uart_type.go b/src/machine/machine_py32_uart_type.go new file mode 100644 index 0000000000..7764e09514 --- /dev/null +++ b/src/machine/machine_py32_uart_type.go @@ -0,0 +1,65 @@ +//go:build py32 && py32_uart_type + +package machine + +import ( + "device/py32" + "runtime/interrupt" +) + +type UART struct { + Bus *py32.UART_Type + Buffer *RingBuffer + irq interrupt.Interrupt + txRetries uint32 + num uint8 +} + +var DefaultUART = &UART{Bus: py32.UART1, Buffer: NewRingBuffer(), num: 1} + +func (uart *UART) Configure(config UARTConfig) error { + if config.BaudRate == 0 { + config.BaudRate = 115200 + } + uart.txRetries = uartTXRetryBudget(config.BaudRate) + if err := configureUARTPins(uart.num, config); err != nil { + return err + } + + py32.RCC.APBENR1.SetBits(py32.RCC_APBENR1_UART1EN) + uart.Bus.CR1.Set(py32.UART_CR1_M_Char8Bits) + uart.Bus.CR2.Set(py32.UART_CR2_RXNEIE) + uart.Bus.CR3.Set(0) + divider := (CPUFrequency() + config.BaudRate*8) / (config.BaudRate * 16) + uart.Bus.BRR.Set(divider) + + uart.irq = interrupt.New(py32.IRQ_UART1, handleUART1Interrupt) + uart.irq.SetPriority(0xc0) + uart.irq.Enable() + return nil +} + +func handleUART1Interrupt(interrupt.Interrupt) { + DefaultUART.Receive(uint8(DefaultUART.Bus.DR.Get())) +} + +func (uart *UART) writeByte(c byte) error { + retries := uart.txRetries + for retries > 0 && uart.Bus.SR.Get()&py32.UART_SR_TDRE == 0 { + uartYield() + retries-- + } + if retries <= 0 { + return errUARTWriteTimeout + } + uart.Bus.DR.Set(uint32(c)) + return nil +} + +func (uart *UART) flush() { + retries := uart.txRetries + for retries > 0 && uart.Bus.SR.Get()&py32.UART_SR_TXE == 0 { + uartYield() + retries-- + } +} diff --git a/src/machine/machine_py32_uart_usart.go b/src/machine/machine_py32_uart_usart.go new file mode 100644 index 0000000000..099c83e0c5 --- /dev/null +++ b/src/machine/machine_py32_uart_usart.go @@ -0,0 +1,9 @@ +//go:build py32 && !py32_uart_type && !py32_usart_unnumbered + +package machine + +import "device/py32" + +func defaultUSART() *py32.USART_Type { + return py32.USART1 +} diff --git a/src/machine/machine_py32_uart_usart_unnumbered.go b/src/machine/machine_py32_uart_usart_unnumbered.go new file mode 100644 index 0000000000..89191a2bfd --- /dev/null +++ b/src/machine/machine_py32_uart_usart_unnumbered.go @@ -0,0 +1,9 @@ +//go:build py32 && py32_usart_unnumbered + +package machine + +import "device/py32" + +func defaultUSART() *py32.USART_Type { + return py32.USART +} diff --git a/src/machine/uart.go b/src/machine/uart.go index 32462587b1..e154672e0c 100644 --- a/src/machine/uart.go +++ b/src/machine/uart.go @@ -1,4 +1,4 @@ -//go:build atmega || esp || nrf || sam || sifive || stm32 || k210 || nxp || rp2040 || rp2350 +//go:build atmega || esp || nrf || sam || sifive || stm32 || k210 || nxp || rp2040 || rp2350 || py32 package machine diff --git a/src/runtime/runtime_cortexm_hardfault.go b/src/runtime/runtime_cortexm_hardfault.go index a1cfc2c3d6..fc59df420d 100644 --- a/src/runtime/runtime_cortexm_hardfault.go +++ b/src/runtime/runtime_cortexm_hardfault.go @@ -1,4 +1,4 @@ -//go:build atsamd21 || nrf51 +//go:build atsamd21 || nrf51 || py32 package runtime diff --git a/src/runtime/runtime_cortexm_hardfault_debug.go b/src/runtime/runtime_cortexm_hardfault_debug.go index 14ab16b35c..80100e12a3 100644 --- a/src/runtime/runtime_cortexm_hardfault_debug.go +++ b/src/runtime/runtime_cortexm_hardfault_debug.go @@ -1,4 +1,4 @@ -//go:build cortexm && !atsamd21 && !nrf51 +//go:build cortexm && !atsamd21 && !nrf51 && !py32 package runtime diff --git a/src/runtime/runtime_py32.go b/src/runtime/runtime_py32.go new file mode 100644 index 0000000000..d796f4e374 --- /dev/null +++ b/src/runtime/runtime_py32.go @@ -0,0 +1,74 @@ +//go:build py32 + +package runtime + +import ( + "device/arm" + "machine" + "runtime/volatile" +) + +var tickCounter volatile.Register64 + +//export Reset_Handler +func main() { + preinit() + + configureHSI() + + configureSystemTimer() + machine.InitSerial() + + run() + exit(0) +} + +// configureSystemTimer configures SysTick for 1ms ticks. +func configureSystemTimer() { + arm.SetupSystemTimer(machine.CPUFrequency() / 1000) +} + +func ticksToNanoseconds(value timeUnit) int64 { + return int64(value * 1000_000) +} + +func nanosecondsToTicks(ns int64) timeUnit { + return timeUnit(ns / 1000_000) +} + +//go:linkname ticks runtime.ticks +func ticks() timeUnit { + return timeUnit(tickCounter.Get()) +} + +func sleepTicks(d timeUnit) { + if d <= 0 { + return + } + start := ticks() + stop := start + d + for ticks() < stop { + waitForEvents() + } +} + +func waitForEvents() { + arm.Asm("wfe") +} + +func putchar(c byte) { + machine.Serial.WriteByte(c) +} + +func getchar() byte { + for machine.Serial.Buffered() == 0 { + Gosched() + } + v, _ := machine.Serial.ReadByte() + return v +} + +//export SysTick_Handler +func handleSysTick() { + tickCounter.Set(tickCounter.Get() + 1) +} diff --git a/src/runtime/runtime_py32_hsi.go b/src/runtime/runtime_py32_hsi.go new file mode 100644 index 0000000000..3e13c817bd --- /dev/null +++ b/src/runtime/runtime_py32_hsi.go @@ -0,0 +1,9 @@ +//go:build py32 && !py32_hsi_fs_op && !py32_no_hsi_fs + +package runtime + +import "device/py32" + +func configureHSI() { + py32.RCC.SetICSCR_HSI_FS(py32.RCC_ICSCR_HSI_FS_Freq24MHz) +} diff --git a/src/runtime/runtime_py32_hsi_none.go b/src/runtime/runtime_py32_hsi_none.go new file mode 100644 index 0000000000..c6e9fd1c9d --- /dev/null +++ b/src/runtime/runtime_py32_hsi_none.go @@ -0,0 +1,8 @@ +//go:build py32 && py32_no_hsi_fs + +package runtime + +// The M4 SVDs do not expose the M0+ ICSCR.HSI_FS selector. Preserve their +// vendor-defined 8 MHz reset clock instead of writing an unverified encoding. +func configureHSI() { +} diff --git a/src/runtime/runtime_py32_hsi_op.go b/src/runtime/runtime_py32_hsi_op.go new file mode 100644 index 0000000000..3b153be156 --- /dev/null +++ b/src/runtime/runtime_py32_hsi_op.go @@ -0,0 +1,11 @@ +//go:build py32 && py32_hsi_fs_op + +package runtime + +import "device/py32" + +// The official L090/T09x headers provide HSI_FS_OP position and mask helpers, +// but no value definitions. Encoding 4 selects the runtime's 24 MHz clock. +func configureHSI() { + py32.RCC.SetICSCR_HSI_FS_OP(4) +} diff --git a/targets/embedfire-py32f002b.json b/targets/embedfire-py32f002b.json new file mode 100644 index 0000000000..0d071ab514 --- /dev/null +++ b/targets/embedfire-py32f002b.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f002bx5" + ], + "build-tags": [ + "embedfire_py32f002b", + "py32_default_uart_pins" + ] +} diff --git a/targets/embedfire-py32f030.json b/targets/embedfire-py32f030.json new file mode 100644 index 0000000000..86e096fde1 --- /dev/null +++ b/targets/embedfire-py32f030.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f030x8" + ], + "build-tags": [ + "embedfire_py32f030", + "py32_default_uart_pins" + ] +} diff --git a/targets/py32-m4.json b/targets/py32-m4.json new file mode 100644 index 0000000000..da18a2e482 --- /dev/null +++ b/targets/py32-m4.json @@ -0,0 +1,11 @@ +{ + "inherits": [ + "cortex-m4" + ], + "scheduler": "none", + "gc": "none", + "serial": "uart", + "build-tags": [ + "py32" + ] +} diff --git a/targets/py32.json b/targets/py32.json new file mode 100644 index 0000000000..3acc4d2981 --- /dev/null +++ b/targets/py32.json @@ -0,0 +1,11 @@ +{ + "inherits": [ + "cortex-m0plus" + ], + "scheduler": "none", + "gc": "none", + "serial": "uart", + "build-tags": [ + "py32" + ] +} diff --git a/targets/py32e407xc.json b/targets/py32e407xc.json new file mode 100644 index 0000000000..ab98614c32 --- /dev/null +++ b/targets/py32e407xc.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32e407xx" + ], + "build-tags": [ + "py32e407xc" + ], + "linkerscript": "targets/py32e407xc.ld" +} diff --git a/targets/py32e407xc.ld b/targets/py32e407xc.ld new file mode 100644 index 0000000000..0d72cb3d6b --- /dev/null +++ b/targets/py32e407xc.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x40000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x1c000 +} + +_stack_size = 4K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32e407xd.json b/targets/py32e407xd.json new file mode 100644 index 0000000000..f32c6b494c --- /dev/null +++ b/targets/py32e407xd.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32e407xx" + ], + "build-tags": [ + "py32e407xd" + ], + "linkerscript": "targets/py32e407xd.ld" +} diff --git a/targets/py32e407xd.ld b/targets/py32e407xd.ld new file mode 100644 index 0000000000..c2cb9cb8cb --- /dev/null +++ b/targets/py32e407xd.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x60000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x24000 +} + +_stack_size = 4K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32e407xe.json b/targets/py32e407xe.json new file mode 100644 index 0000000000..581cd20f06 --- /dev/null +++ b/targets/py32e407xe.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32e407xx" + ], + "build-tags": [ + "py32e407xe" + ], + "linkerscript": "targets/py32e407xe.ld" +} diff --git a/targets/py32e407xe.ld b/targets/py32e407xe.ld new file mode 100644 index 0000000000..ff1e0e6eca --- /dev/null +++ b/targets/py32e407xe.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x80000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x24000 +} + +_stack_size = 4K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32e407xx.json b/targets/py32e407xx.json new file mode 100644 index 0000000000..dabb31491b --- /dev/null +++ b/targets/py32e407xx.json @@ -0,0 +1,16 @@ +{ + "inherits": [ + "py32-m4" + ], + "build-tags": [ + "py32e407xx", + "py32_gpio_ospdder", + "py32_gpio_clock_ahb2", + "py32_no_hsi_fs", + "py32_usart_split_data", + "py32_uart_clock_apb2" + ], + "extra-files": [ + "src/device/py32/py32e407xx.s" + ] +} diff --git a/targets/py32f001cx4.json b/targets/py32f001cx4.json new file mode 100644 index 0000000000..7b97a9b226 --- /dev/null +++ b/targets/py32f001cx4.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f001cxx" + ], + "build-tags": [ + "py32f001cx4" + ], + "linkerscript": "targets/py32f001cx4.ld" +} diff --git a/targets/py32f001cx4.ld b/targets/py32f001cx4.ld new file mode 100644 index 0000000000..ff5b46251c --- /dev/null +++ b/targets/py32f001cx4.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x4000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0xc00 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f001cxx.json b/targets/py32f001cxx.json new file mode 100644 index 0000000000..86836864cc --- /dev/null +++ b/targets/py32f001cxx.json @@ -0,0 +1,13 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32f001cxx", + "py32_no_gpio_afrh", + "py32_usart1_clock_literal" + ], + "extra-files": [ + "src/device/py32/py32f001cxx.s" + ] +} diff --git a/targets/py32f001xx.json b/targets/py32f001xx.json new file mode 100644 index 0000000000..b53ec8bbb0 --- /dev/null +++ b/targets/py32f001xx.json @@ -0,0 +1,12 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32f001xx", + "py32_usart1_clock_literal" + ], + "extra-files": [ + "src/device/py32/py32f001xx.s" + ] +} diff --git a/targets/py32f002ax5.json b/targets/py32f002ax5.json new file mode 100644 index 0000000000..c2ab2878b6 --- /dev/null +++ b/targets/py32f002ax5.json @@ -0,0 +1,10 @@ +{ + "inherits": [ + "py32f002axx" + ], + "build-tags": [ + "py32f002ax5" + ], + "linkerscript": "targets/py32f002ax5.ld", + "flash-command": "pyocd load -t py32f002ax5 {bin}" +} diff --git a/targets/py32f002ax5.ld b/targets/py32f002ax5.ld new file mode 100644 index 0000000000..997e8861a9 --- /dev/null +++ b/targets/py32f002ax5.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x5000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0xc00 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f002axx.json b/targets/py32f002axx.json new file mode 100644 index 0000000000..5aa3bca284 --- /dev/null +++ b/targets/py32f002axx.json @@ -0,0 +1,11 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32f002axx" + ], + "extra-files": [ + "src/device/py32/py32f002axx.s" + ] +} diff --git a/targets/py32f002bx5.json b/targets/py32f002bx5.json new file mode 100644 index 0000000000..16b267b2da --- /dev/null +++ b/targets/py32f002bx5.json @@ -0,0 +1,10 @@ +{ + "inherits": [ + "py32f002bxx" + ], + "build-tags": [ + "py32f002bx5" + ], + "linkerscript": "targets/py32f002bx5.ld", + "flash-command": "pyocd load -t py32f002bx5 {bin}" +} diff --git a/targets/py32f002bx5.ld b/targets/py32f002bx5.ld new file mode 100644 index 0000000000..f0d8e67602 --- /dev/null +++ b/targets/py32f002bx5.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x6000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0xc00 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f002bxx.json b/targets/py32f002bxx.json new file mode 100644 index 0000000000..b6f5ee532c --- /dev/null +++ b/targets/py32f002bxx.json @@ -0,0 +1,12 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32f002bxx", + "py32_no_gpio_afrh" + ], + "extra-files": [ + "src/device/py32/py32f002bxx.s" + ] +} diff --git a/targets/py32f002cx5.json b/targets/py32f002cx5.json new file mode 100644 index 0000000000..b27921f3aa --- /dev/null +++ b/targets/py32f002cx5.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f002cxx" + ], + "build-tags": [ + "py32f002cx5" + ], + "linkerscript": "targets/py32f002cx5.ld" +} diff --git a/targets/py32f002cx5.ld b/targets/py32f002cx5.ld new file mode 100644 index 0000000000..3fe1a37288 --- /dev/null +++ b/targets/py32f002cx5.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x8000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0xc00 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f002cxx.json b/targets/py32f002cxx.json new file mode 100644 index 0000000000..e7f83f92f3 --- /dev/null +++ b/targets/py32f002cxx.json @@ -0,0 +1,12 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32f002cxx", + "py32_no_gpio_afrh" + ], + "extra-files": [ + "src/device/py32/py32f002cxx.s" + ] +} diff --git a/targets/py32f002xx2.json b/targets/py32f002xx2.json new file mode 100644 index 0000000000..8b2851e8d2 --- /dev/null +++ b/targets/py32f002xx2.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f002xxx" + ], + "build-tags": [ + "py32f002xx2" + ], + "linkerscript": "targets/py32f002xx2.ld" +} diff --git a/targets/py32f002xx2.ld b/targets/py32f002xx2.ld new file mode 100644 index 0000000000..2406c1bdba --- /dev/null +++ b/targets/py32f002xx2.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x2000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0xc00 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f002xx4.json b/targets/py32f002xx4.json new file mode 100644 index 0000000000..07aa9b6ba0 --- /dev/null +++ b/targets/py32f002xx4.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f002xxx" + ], + "build-tags": [ + "py32f002xx4" + ], + "linkerscript": "targets/py32f002xx4.ld" +} diff --git a/targets/py32f002xx4.ld b/targets/py32f002xx4.ld new file mode 100644 index 0000000000..ff5b46251c --- /dev/null +++ b/targets/py32f002xx4.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x4000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0xc00 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f002xx5.json b/targets/py32f002xx5.json new file mode 100644 index 0000000000..f5eb747d80 --- /dev/null +++ b/targets/py32f002xx5.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f002xxx" + ], + "build-tags": [ + "py32f002xx5" + ], + "linkerscript": "targets/py32f002xx5.ld" +} diff --git a/targets/py32f002xx5.ld b/targets/py32f002xx5.ld new file mode 100644 index 0000000000..f0d8e67602 --- /dev/null +++ b/targets/py32f002xx5.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x6000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0xc00 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f002xxx.json b/targets/py32f002xxx.json new file mode 100644 index 0000000000..c154530c4d --- /dev/null +++ b/targets/py32f002xxx.json @@ -0,0 +1,12 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32f002xxx", + "py32_no_gpio_afrh" + ], + "extra-files": [ + "src/device/py32/py32f002xxx.s" + ] +} diff --git a/targets/py32f002zx4.json b/targets/py32f002zx4.json new file mode 100644 index 0000000000..f35701b51a --- /dev/null +++ b/targets/py32f002zx4.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f002zxx" + ], + "build-tags": [ + "py32f002zx4" + ], + "linkerscript": "targets/py32f002zx4.ld" +} diff --git a/targets/py32f002zx4.ld b/targets/py32f002zx4.ld new file mode 100644 index 0000000000..ff5b46251c --- /dev/null +++ b/targets/py32f002zx4.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x4000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0xc00 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f002zxx.json b/targets/py32f002zxx.json new file mode 100644 index 0000000000..4309cededd --- /dev/null +++ b/targets/py32f002zxx.json @@ -0,0 +1,12 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32f002zxx", + "py32_no_gpio_afrh" + ], + "extra-files": [ + "src/device/py32/py32f002zxx.s" + ] +} diff --git a/targets/py32f003x4.json b/targets/py32f003x4.json new file mode 100644 index 0000000000..0abd943754 --- /dev/null +++ b/targets/py32f003x4.json @@ -0,0 +1,10 @@ +{ + "inherits": [ + "py32f003xx" + ], + "build-tags": [ + "py32f003x4" + ], + "linkerscript": "targets/py32f003x4.ld", + "flash-command": "pyocd load -t py32f003x4 {bin}" +} diff --git a/targets/py32f003x4.ld b/targets/py32f003x4.ld new file mode 100644 index 0000000000..3f9d35453d --- /dev/null +++ b/targets/py32f003x4.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x4000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x800 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f003x6.json b/targets/py32f003x6.json new file mode 100644 index 0000000000..a077dfcb89 --- /dev/null +++ b/targets/py32f003x6.json @@ -0,0 +1,10 @@ +{ + "inherits": [ + "py32f003xx" + ], + "build-tags": [ + "py32f003x6" + ], + "linkerscript": "targets/py32f003x6.ld", + "flash-command": "pyocd load -t py32f003x6 {bin}" +} diff --git a/targets/py32f003x6.ld b/targets/py32f003x6.ld new file mode 100644 index 0000000000..36be015b7f --- /dev/null +++ b/targets/py32f003x6.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x8000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x1000 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f003x7.json b/targets/py32f003x7.json new file mode 100644 index 0000000000..b92f567479 --- /dev/null +++ b/targets/py32f003x7.json @@ -0,0 +1,10 @@ +{ + "inherits": [ + "py32f003xx" + ], + "build-tags": [ + "py32f003x7" + ], + "linkerscript": "targets/py32f003x7.ld", + "flash-command": "pyocd load -t py32f003x7 {bin}" +} diff --git a/targets/py32f003x7.ld b/targets/py32f003x7.ld new file mode 100644 index 0000000000..63dd4310aa --- /dev/null +++ b/targets/py32f003x7.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0xc000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x1800 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f003x8.json b/targets/py32f003x8.json new file mode 100644 index 0000000000..dbba064c80 --- /dev/null +++ b/targets/py32f003x8.json @@ -0,0 +1,10 @@ +{ + "inherits": [ + "py32f003xx" + ], + "build-tags": [ + "py32f003x8" + ], + "linkerscript": "targets/py32f003x8.ld", + "flash-command": "pyocd load -t py32f003x8 {bin}" +} diff --git a/targets/py32f003x8.ld b/targets/py32f003x8.ld new file mode 100644 index 0000000000..7e7e6b6b50 --- /dev/null +++ b/targets/py32f003x8.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x10000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x2000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f003xx.json b/targets/py32f003xx.json new file mode 100644 index 0000000000..1e8aaca9d2 --- /dev/null +++ b/targets/py32f003xx.json @@ -0,0 +1,11 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32f003xx" + ], + "extra-files": [ + "src/device/py32/py32f003xx.s" + ] +} diff --git a/targets/py32f021x8.json b/targets/py32f021x8.json new file mode 100644 index 0000000000..79f8bed4d1 --- /dev/null +++ b/targets/py32f021x8.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f021xx" + ], + "build-tags": [ + "py32f021x8" + ], + "linkerscript": "targets/py32f021x8.ld" +} diff --git a/targets/py32f021x8.ld b/targets/py32f021x8.ld new file mode 100644 index 0000000000..7e7e6b6b50 --- /dev/null +++ b/targets/py32f021x8.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x10000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x2000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f021xx.json b/targets/py32f021xx.json new file mode 100644 index 0000000000..458103ffce --- /dev/null +++ b/targets/py32f021xx.json @@ -0,0 +1,11 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32f021xx" + ], + "extra-files": [ + "src/device/py32/py32f021xx.s" + ] +} diff --git a/targets/py32f030x4.json b/targets/py32f030x4.json new file mode 100644 index 0000000000..e1332d6390 --- /dev/null +++ b/targets/py32f030x4.json @@ -0,0 +1,10 @@ +{ + "inherits": [ + "py32f030xx" + ], + "build-tags": [ + "py32f030x4" + ], + "linkerscript": "targets/py32f030x4.ld", + "flash-command": "pyocd load -t py32f030x4 {bin}" +} diff --git a/targets/py32f030x4.ld b/targets/py32f030x4.ld new file mode 100644 index 0000000000..3f9d35453d --- /dev/null +++ b/targets/py32f030x4.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x4000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x800 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f030x6.json b/targets/py32f030x6.json new file mode 100644 index 0000000000..58d419ce4d --- /dev/null +++ b/targets/py32f030x6.json @@ -0,0 +1,10 @@ +{ + "inherits": [ + "py32f030xx" + ], + "build-tags": [ + "py32f030x6" + ], + "linkerscript": "targets/py32f030x6.ld", + "flash-command": "pyocd load -t py32f030x6 {bin}" +} diff --git a/targets/py32f030x6.ld b/targets/py32f030x6.ld new file mode 100644 index 0000000000..36be015b7f --- /dev/null +++ b/targets/py32f030x6.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x8000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x1000 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f030x7.json b/targets/py32f030x7.json new file mode 100644 index 0000000000..61e704065d --- /dev/null +++ b/targets/py32f030x7.json @@ -0,0 +1,10 @@ +{ + "inherits": [ + "py32f030xx" + ], + "build-tags": [ + "py32f030x7" + ], + "linkerscript": "targets/py32f030x7.ld", + "flash-command": "pyocd load -t py32f030x7 {bin}" +} diff --git a/targets/py32f030x7.ld b/targets/py32f030x7.ld new file mode 100644 index 0000000000..63dd4310aa --- /dev/null +++ b/targets/py32f030x7.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0xc000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x1800 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f030x8.json b/targets/py32f030x8.json new file mode 100644 index 0000000000..440decefba --- /dev/null +++ b/targets/py32f030x8.json @@ -0,0 +1,10 @@ +{ + "inherits": [ + "py32f030xx" + ], + "build-tags": [ + "py32f030x8" + ], + "linkerscript": "targets/py32f030x8.ld", + "flash-command": "pyocd load -t py32f030x8 {bin}" +} diff --git a/targets/py32f030x8.ld b/targets/py32f030x8.ld new file mode 100644 index 0000000000..7e7e6b6b50 --- /dev/null +++ b/targets/py32f030x8.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x10000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x2000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f030xx.json b/targets/py32f030xx.json new file mode 100644 index 0000000000..4546792db5 --- /dev/null +++ b/targets/py32f030xx.json @@ -0,0 +1,11 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32f030xx" + ], + "extra-files": [ + "src/device/py32/py32f030xx.s" + ] +} diff --git a/targets/py32f031x4.json b/targets/py32f031x4.json new file mode 100644 index 0000000000..918686a4e9 --- /dev/null +++ b/targets/py32f031x4.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f031xx" + ], + "build-tags": [ + "py32f031x4" + ], + "linkerscript": "targets/py32f031x4.ld" +} diff --git a/targets/py32f031x4.ld b/targets/py32f031x4.ld new file mode 100644 index 0000000000..3f9d35453d --- /dev/null +++ b/targets/py32f031x4.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x4000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x800 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f031x6.json b/targets/py32f031x6.json new file mode 100644 index 0000000000..a7c1ea0728 --- /dev/null +++ b/targets/py32f031x6.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f031xx" + ], + "build-tags": [ + "py32f031x6" + ], + "linkerscript": "targets/py32f031x6.ld" +} diff --git a/targets/py32f031x6.ld b/targets/py32f031x6.ld new file mode 100644 index 0000000000..36be015b7f --- /dev/null +++ b/targets/py32f031x6.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x8000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x1000 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f031x7.json b/targets/py32f031x7.json new file mode 100644 index 0000000000..b4e5ce3962 --- /dev/null +++ b/targets/py32f031x7.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f031xx" + ], + "build-tags": [ + "py32f031x7" + ], + "linkerscript": "targets/py32f031x7.ld" +} diff --git a/targets/py32f031x7.ld b/targets/py32f031x7.ld new file mode 100644 index 0000000000..63dd4310aa --- /dev/null +++ b/targets/py32f031x7.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0xc000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x1800 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f031x8.json b/targets/py32f031x8.json new file mode 100644 index 0000000000..c60ca0a713 --- /dev/null +++ b/targets/py32f031x8.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f031xx" + ], + "build-tags": [ + "py32f031x8" + ], + "linkerscript": "targets/py32f031x8.ld" +} diff --git a/targets/py32f031x8.ld b/targets/py32f031x8.ld new file mode 100644 index 0000000000..7e7e6b6b50 --- /dev/null +++ b/targets/py32f031x8.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x10000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x2000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f031xx.json b/targets/py32f031xx.json new file mode 100644 index 0000000000..ea27648d72 --- /dev/null +++ b/targets/py32f031xx.json @@ -0,0 +1,11 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32f031xx" + ], + "extra-files": [ + "src/device/py32/py32f031xx.s" + ] +} diff --git a/targets/py32f032x8.json b/targets/py32f032x8.json new file mode 100644 index 0000000000..372973c077 --- /dev/null +++ b/targets/py32f032x8.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f032xx" + ], + "build-tags": [ + "py32f032x8" + ], + "linkerscript": "targets/py32f032x8.ld" +} diff --git a/targets/py32f032x8.ld b/targets/py32f032x8.ld new file mode 100644 index 0000000000..7e7e6b6b50 --- /dev/null +++ b/targets/py32f032x8.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x10000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x2000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f032xx.json b/targets/py32f032xx.json new file mode 100644 index 0000000000..be4cc0c5da --- /dev/null +++ b/targets/py32f032xx.json @@ -0,0 +1,11 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32f032xx" + ], + "extra-files": [ + "src/device/py32/py32f032xx.s" + ] +} diff --git a/targets/py32f040cx6.json b/targets/py32f040cx6.json new file mode 100644 index 0000000000..a622d5f0c6 --- /dev/null +++ b/targets/py32f040cx6.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f040cxx" + ], + "build-tags": [ + "py32f040cx6" + ], + "linkerscript": "targets/py32f040cx6.ld" +} diff --git a/targets/py32f040cx6.ld b/targets/py32f040cx6.ld new file mode 100644 index 0000000000..36be015b7f --- /dev/null +++ b/targets/py32f040cx6.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x8000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x1000 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f040cx8.json b/targets/py32f040cx8.json new file mode 100644 index 0000000000..4f3eecbdc2 --- /dev/null +++ b/targets/py32f040cx8.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f040cxx" + ], + "build-tags": [ + "py32f040cx8" + ], + "linkerscript": "targets/py32f040cx8.ld" +} diff --git a/targets/py32f040cx8.ld b/targets/py32f040cx8.ld new file mode 100644 index 0000000000..7e7e6b6b50 --- /dev/null +++ b/targets/py32f040cx8.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x10000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x2000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f040cx9.json b/targets/py32f040cx9.json new file mode 100644 index 0000000000..32cc3e3dfa --- /dev/null +++ b/targets/py32f040cx9.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f040cxx" + ], + "build-tags": [ + "py32f040cx9" + ], + "linkerscript": "targets/py32f040cx9.ld" +} diff --git a/targets/py32f040cx9.ld b/targets/py32f040cx9.ld new file mode 100644 index 0000000000..16b6fea7cf --- /dev/null +++ b/targets/py32f040cx9.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x18000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x3000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f040cxb.json b/targets/py32f040cxb.json new file mode 100644 index 0000000000..2b356c4f7c --- /dev/null +++ b/targets/py32f040cxb.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f040cxx" + ], + "build-tags": [ + "py32f040cxb" + ], + "linkerscript": "targets/py32f040cxb.ld" +} diff --git a/targets/py32f040cxb.ld b/targets/py32f040cxb.ld new file mode 100644 index 0000000000..6cb6a79360 --- /dev/null +++ b/targets/py32f040cxb.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x20000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x4000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f040cxx.json b/targets/py32f040cxx.json new file mode 100644 index 0000000000..119dae0b17 --- /dev/null +++ b/targets/py32f040cxx.json @@ -0,0 +1,11 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32f040cxx" + ], + "extra-files": [ + "src/device/py32/py32f040cxx.s" + ] +} diff --git a/targets/py32f040epxb.json b/targets/py32f040epxb.json new file mode 100644 index 0000000000..a724082745 --- /dev/null +++ b/targets/py32f040epxb.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f040epxx" + ], + "build-tags": [ + "py32f040epxb" + ], + "linkerscript": "targets/py32f040epxb.ld" +} diff --git a/targets/py32f040epxb.ld b/targets/py32f040epxb.ld new file mode 100644 index 0000000000..6cb6a79360 --- /dev/null +++ b/targets/py32f040epxb.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x20000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x4000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f040epxx.json b/targets/py32f040epxx.json new file mode 100644 index 0000000000..63886e3788 --- /dev/null +++ b/targets/py32f040epxx.json @@ -0,0 +1,11 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32f040epxx" + ], + "extra-files": [ + "src/device/py32/py32f040epxx.s" + ] +} diff --git a/targets/py32f040ex6.json b/targets/py32f040ex6.json new file mode 100644 index 0000000000..a2d15f3ac3 --- /dev/null +++ b/targets/py32f040ex6.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f040exx" + ], + "build-tags": [ + "py32f040ex6" + ], + "linkerscript": "targets/py32f040ex6.ld" +} diff --git a/targets/py32f040ex6.ld b/targets/py32f040ex6.ld new file mode 100644 index 0000000000..36be015b7f --- /dev/null +++ b/targets/py32f040ex6.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x8000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x1000 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f040ex8.json b/targets/py32f040ex8.json new file mode 100644 index 0000000000..200780bad7 --- /dev/null +++ b/targets/py32f040ex8.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f040exx" + ], + "build-tags": [ + "py32f040ex8" + ], + "linkerscript": "targets/py32f040ex8.ld" +} diff --git a/targets/py32f040ex8.ld b/targets/py32f040ex8.ld new file mode 100644 index 0000000000..7e7e6b6b50 --- /dev/null +++ b/targets/py32f040ex8.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x10000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x2000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f040ex9.json b/targets/py32f040ex9.json new file mode 100644 index 0000000000..11d893870f --- /dev/null +++ b/targets/py32f040ex9.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f040exx" + ], + "build-tags": [ + "py32f040ex9" + ], + "linkerscript": "targets/py32f040ex9.ld" +} diff --git a/targets/py32f040ex9.ld b/targets/py32f040ex9.ld new file mode 100644 index 0000000000..16b6fea7cf --- /dev/null +++ b/targets/py32f040ex9.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x18000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x3000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f040exb.json b/targets/py32f040exb.json new file mode 100644 index 0000000000..50f20d7ea4 --- /dev/null +++ b/targets/py32f040exb.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f040exx" + ], + "build-tags": [ + "py32f040exb" + ], + "linkerscript": "targets/py32f040exb.ld" +} diff --git a/targets/py32f040exb.ld b/targets/py32f040exb.ld new file mode 100644 index 0000000000..6cb6a79360 --- /dev/null +++ b/targets/py32f040exb.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x20000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x4000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f040exx.json b/targets/py32f040exx.json new file mode 100644 index 0000000000..6188ddfdb5 --- /dev/null +++ b/targets/py32f040exx.json @@ -0,0 +1,11 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32f040exx" + ], + "extra-files": [ + "src/device/py32/py32f040exx.s" + ] +} diff --git a/targets/py32f040x6.json b/targets/py32f040x6.json new file mode 100644 index 0000000000..9d2d184c36 --- /dev/null +++ b/targets/py32f040x6.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f040xx" + ], + "build-tags": [ + "py32f040x6" + ], + "linkerscript": "targets/py32f040x6.ld" +} diff --git a/targets/py32f040x6.ld b/targets/py32f040x6.ld new file mode 100644 index 0000000000..36be015b7f --- /dev/null +++ b/targets/py32f040x6.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x8000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x1000 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f040x8.json b/targets/py32f040x8.json new file mode 100644 index 0000000000..f9ca8454d6 --- /dev/null +++ b/targets/py32f040x8.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f040xx" + ], + "build-tags": [ + "py32f040x8" + ], + "linkerscript": "targets/py32f040x8.ld" +} diff --git a/targets/py32f040x8.ld b/targets/py32f040x8.ld new file mode 100644 index 0000000000..7e7e6b6b50 --- /dev/null +++ b/targets/py32f040x8.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x10000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x2000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f040x9.json b/targets/py32f040x9.json new file mode 100644 index 0000000000..26a29f6594 --- /dev/null +++ b/targets/py32f040x9.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f040xx" + ], + "build-tags": [ + "py32f040x9" + ], + "linkerscript": "targets/py32f040x9.ld" +} diff --git a/targets/py32f040x9.ld b/targets/py32f040x9.ld new file mode 100644 index 0000000000..16b6fea7cf --- /dev/null +++ b/targets/py32f040x9.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x18000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x3000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f040xb.json b/targets/py32f040xb.json new file mode 100644 index 0000000000..032fc67f72 --- /dev/null +++ b/targets/py32f040xb.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f040xx" + ], + "build-tags": [ + "py32f040xb" + ], + "linkerscript": "targets/py32f040xb.ld" +} diff --git a/targets/py32f040xb.ld b/targets/py32f040xb.ld new file mode 100644 index 0000000000..6cb6a79360 --- /dev/null +++ b/targets/py32f040xb.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x20000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x4000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f040xx.json b/targets/py32f040xx.json new file mode 100644 index 0000000000..124c4d99ef --- /dev/null +++ b/targets/py32f040xx.json @@ -0,0 +1,11 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32f040xx" + ], + "extra-files": [ + "src/device/py32/py32f040xx.s" + ] +} diff --git a/targets/py32f071cx6.json b/targets/py32f071cx6.json new file mode 100644 index 0000000000..427e70c01a --- /dev/null +++ b/targets/py32f071cx6.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f071cxx" + ], + "build-tags": [ + "py32f071cx6" + ], + "linkerscript": "targets/py32f071cx6.ld" +} diff --git a/targets/py32f071cx6.ld b/targets/py32f071cx6.ld new file mode 100644 index 0000000000..36be015b7f --- /dev/null +++ b/targets/py32f071cx6.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x8000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x1000 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f071cx8.json b/targets/py32f071cx8.json new file mode 100644 index 0000000000..9d9a010d3a --- /dev/null +++ b/targets/py32f071cx8.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f071cxx" + ], + "build-tags": [ + "py32f071cx8" + ], + "linkerscript": "targets/py32f071cx8.ld" +} diff --git a/targets/py32f071cx8.ld b/targets/py32f071cx8.ld new file mode 100644 index 0000000000..7e7e6b6b50 --- /dev/null +++ b/targets/py32f071cx8.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x10000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x2000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f071cx9.json b/targets/py32f071cx9.json new file mode 100644 index 0000000000..8e5199aa23 --- /dev/null +++ b/targets/py32f071cx9.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f071cxx" + ], + "build-tags": [ + "py32f071cx9" + ], + "linkerscript": "targets/py32f071cx9.ld" +} diff --git a/targets/py32f071cx9.ld b/targets/py32f071cx9.ld new file mode 100644 index 0000000000..16b6fea7cf --- /dev/null +++ b/targets/py32f071cx9.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x18000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x3000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f071cxb.json b/targets/py32f071cxb.json new file mode 100644 index 0000000000..ef115b3847 --- /dev/null +++ b/targets/py32f071cxb.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f071cxx" + ], + "build-tags": [ + "py32f071cxb" + ], + "linkerscript": "targets/py32f071cxb.ld" +} diff --git a/targets/py32f071cxb.ld b/targets/py32f071cxb.ld new file mode 100644 index 0000000000..6cb6a79360 --- /dev/null +++ b/targets/py32f071cxb.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x20000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x4000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f071cxx.json b/targets/py32f071cxx.json new file mode 100644 index 0000000000..0f750f1970 --- /dev/null +++ b/targets/py32f071cxx.json @@ -0,0 +1,11 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32f071cxx" + ], + "extra-files": [ + "src/device/py32/py32f071cxx.s" + ] +} diff --git a/targets/py32f071ex6.json b/targets/py32f071ex6.json new file mode 100644 index 0000000000..f91d3e0506 --- /dev/null +++ b/targets/py32f071ex6.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f071exx" + ], + "build-tags": [ + "py32f071ex6" + ], + "linkerscript": "targets/py32f071ex6.ld" +} diff --git a/targets/py32f071ex6.ld b/targets/py32f071ex6.ld new file mode 100644 index 0000000000..36be015b7f --- /dev/null +++ b/targets/py32f071ex6.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x8000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x1000 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f071ex8.json b/targets/py32f071ex8.json new file mode 100644 index 0000000000..8bd64ad760 --- /dev/null +++ b/targets/py32f071ex8.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f071exx" + ], + "build-tags": [ + "py32f071ex8" + ], + "linkerscript": "targets/py32f071ex8.ld" +} diff --git a/targets/py32f071ex8.ld b/targets/py32f071ex8.ld new file mode 100644 index 0000000000..7e7e6b6b50 --- /dev/null +++ b/targets/py32f071ex8.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x10000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x2000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f071ex9.json b/targets/py32f071ex9.json new file mode 100644 index 0000000000..0364ac1607 --- /dev/null +++ b/targets/py32f071ex9.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f071exx" + ], + "build-tags": [ + "py32f071ex9" + ], + "linkerscript": "targets/py32f071ex9.ld" +} diff --git a/targets/py32f071ex9.ld b/targets/py32f071ex9.ld new file mode 100644 index 0000000000..16b6fea7cf --- /dev/null +++ b/targets/py32f071ex9.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x18000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x3000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f071exb.json b/targets/py32f071exb.json new file mode 100644 index 0000000000..50f21c7e85 --- /dev/null +++ b/targets/py32f071exb.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f071exx" + ], + "build-tags": [ + "py32f071exb" + ], + "linkerscript": "targets/py32f071exb.ld" +} diff --git a/targets/py32f071exb.ld b/targets/py32f071exb.ld new file mode 100644 index 0000000000..6cb6a79360 --- /dev/null +++ b/targets/py32f071exb.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x20000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x4000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f071exx.json b/targets/py32f071exx.json new file mode 100644 index 0000000000..c214dcc46d --- /dev/null +++ b/targets/py32f071exx.json @@ -0,0 +1,11 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32f071exx" + ], + "extra-files": [ + "src/device/py32/py32f071exx.s" + ] +} diff --git a/targets/py32f071x6.json b/targets/py32f071x6.json new file mode 100644 index 0000000000..122b9bd804 --- /dev/null +++ b/targets/py32f071x6.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f071xx" + ], + "build-tags": [ + "py32f071x6" + ], + "linkerscript": "targets/py32f071x6.ld" +} diff --git a/targets/py32f071x6.ld b/targets/py32f071x6.ld new file mode 100644 index 0000000000..36be015b7f --- /dev/null +++ b/targets/py32f071x6.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x8000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x1000 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f071x8.json b/targets/py32f071x8.json new file mode 100644 index 0000000000..e98caa23bf --- /dev/null +++ b/targets/py32f071x8.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f071xx" + ], + "build-tags": [ + "py32f071x8" + ], + "linkerscript": "targets/py32f071x8.ld" +} diff --git a/targets/py32f071x8.ld b/targets/py32f071x8.ld new file mode 100644 index 0000000000..7e7e6b6b50 --- /dev/null +++ b/targets/py32f071x8.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x10000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x2000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f071x9.json b/targets/py32f071x9.json new file mode 100644 index 0000000000..066350d3e0 --- /dev/null +++ b/targets/py32f071x9.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f071xx" + ], + "build-tags": [ + "py32f071x9" + ], + "linkerscript": "targets/py32f071x9.ld" +} diff --git a/targets/py32f071x9.ld b/targets/py32f071x9.ld new file mode 100644 index 0000000000..16b6fea7cf --- /dev/null +++ b/targets/py32f071x9.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x18000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x3000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f071xb.json b/targets/py32f071xb.json new file mode 100644 index 0000000000..3425898190 --- /dev/null +++ b/targets/py32f071xb.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f071xx" + ], + "build-tags": [ + "py32f071xb" + ], + "linkerscript": "targets/py32f071xb.ld" +} diff --git a/targets/py32f071xb.ld b/targets/py32f071xb.ld new file mode 100644 index 0000000000..6cb6a79360 --- /dev/null +++ b/targets/py32f071xb.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x20000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x4000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f071xx.json b/targets/py32f071xx.json new file mode 100644 index 0000000000..f35bffac22 --- /dev/null +++ b/targets/py32f071xx.json @@ -0,0 +1,11 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32f071xx" + ], + "extra-files": [ + "src/device/py32/py32f071xx.s" + ] +} diff --git a/targets/py32f072cx6.json b/targets/py32f072cx6.json new file mode 100644 index 0000000000..65c61eac72 --- /dev/null +++ b/targets/py32f072cx6.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f072cxx" + ], + "build-tags": [ + "py32f072cx6" + ], + "linkerscript": "targets/py32f072cx6.ld" +} diff --git a/targets/py32f072cx6.ld b/targets/py32f072cx6.ld new file mode 100644 index 0000000000..36be015b7f --- /dev/null +++ b/targets/py32f072cx6.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x8000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x1000 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f072cx8.json b/targets/py32f072cx8.json new file mode 100644 index 0000000000..3c132f8981 --- /dev/null +++ b/targets/py32f072cx8.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f072cxx" + ], + "build-tags": [ + "py32f072cx8" + ], + "linkerscript": "targets/py32f072cx8.ld" +} diff --git a/targets/py32f072cx8.ld b/targets/py32f072cx8.ld new file mode 100644 index 0000000000..7e7e6b6b50 --- /dev/null +++ b/targets/py32f072cx8.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x10000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x2000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f072cx9.json b/targets/py32f072cx9.json new file mode 100644 index 0000000000..682c894925 --- /dev/null +++ b/targets/py32f072cx9.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f072cxx" + ], + "build-tags": [ + "py32f072cx9" + ], + "linkerscript": "targets/py32f072cx9.ld" +} diff --git a/targets/py32f072cx9.ld b/targets/py32f072cx9.ld new file mode 100644 index 0000000000..16b6fea7cf --- /dev/null +++ b/targets/py32f072cx9.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x18000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x3000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f072cxb.json b/targets/py32f072cxb.json new file mode 100644 index 0000000000..975b5a9cfe --- /dev/null +++ b/targets/py32f072cxb.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f072cxx" + ], + "build-tags": [ + "py32f072cxb" + ], + "linkerscript": "targets/py32f072cxb.ld" +} diff --git a/targets/py32f072cxb.ld b/targets/py32f072cxb.ld new file mode 100644 index 0000000000..6cb6a79360 --- /dev/null +++ b/targets/py32f072cxb.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x20000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x4000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f072cxx.json b/targets/py32f072cxx.json new file mode 100644 index 0000000000..b637a59c29 --- /dev/null +++ b/targets/py32f072cxx.json @@ -0,0 +1,11 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32f072cxx" + ], + "extra-files": [ + "src/device/py32/py32f072cxx.s" + ] +} diff --git a/targets/py32f072ex6.json b/targets/py32f072ex6.json new file mode 100644 index 0000000000..7af1ea8173 --- /dev/null +++ b/targets/py32f072ex6.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f072exx" + ], + "build-tags": [ + "py32f072ex6" + ], + "linkerscript": "targets/py32f072ex6.ld" +} diff --git a/targets/py32f072ex6.ld b/targets/py32f072ex6.ld new file mode 100644 index 0000000000..36be015b7f --- /dev/null +++ b/targets/py32f072ex6.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x8000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x1000 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f072ex8.json b/targets/py32f072ex8.json new file mode 100644 index 0000000000..ed5cc2018b --- /dev/null +++ b/targets/py32f072ex8.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f072exx" + ], + "build-tags": [ + "py32f072ex8" + ], + "linkerscript": "targets/py32f072ex8.ld" +} diff --git a/targets/py32f072ex8.ld b/targets/py32f072ex8.ld new file mode 100644 index 0000000000..7e7e6b6b50 --- /dev/null +++ b/targets/py32f072ex8.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x10000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x2000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f072ex9.json b/targets/py32f072ex9.json new file mode 100644 index 0000000000..b1dc83df8f --- /dev/null +++ b/targets/py32f072ex9.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f072exx" + ], + "build-tags": [ + "py32f072ex9" + ], + "linkerscript": "targets/py32f072ex9.ld" +} diff --git a/targets/py32f072ex9.ld b/targets/py32f072ex9.ld new file mode 100644 index 0000000000..16b6fea7cf --- /dev/null +++ b/targets/py32f072ex9.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x18000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x3000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f072exb.json b/targets/py32f072exb.json new file mode 100644 index 0000000000..c73f5dde51 --- /dev/null +++ b/targets/py32f072exb.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f072exx" + ], + "build-tags": [ + "py32f072exb" + ], + "linkerscript": "targets/py32f072exb.ld" +} diff --git a/targets/py32f072exb.ld b/targets/py32f072exb.ld new file mode 100644 index 0000000000..6cb6a79360 --- /dev/null +++ b/targets/py32f072exb.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x20000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x4000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f072exx.json b/targets/py32f072exx.json new file mode 100644 index 0000000000..2d8ebfc3b8 --- /dev/null +++ b/targets/py32f072exx.json @@ -0,0 +1,11 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32f072exx" + ], + "extra-files": [ + "src/device/py32/py32f072exx.s" + ] +} diff --git a/targets/py32f072x6.json b/targets/py32f072x6.json new file mode 100644 index 0000000000..e8a50ad05b --- /dev/null +++ b/targets/py32f072x6.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f072xx" + ], + "build-tags": [ + "py32f072x6" + ], + "linkerscript": "targets/py32f072x6.ld" +} diff --git a/targets/py32f072x6.ld b/targets/py32f072x6.ld new file mode 100644 index 0000000000..36be015b7f --- /dev/null +++ b/targets/py32f072x6.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x8000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x1000 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f072x8.json b/targets/py32f072x8.json new file mode 100644 index 0000000000..4e147bdadb --- /dev/null +++ b/targets/py32f072x8.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f072xx" + ], + "build-tags": [ + "py32f072x8" + ], + "linkerscript": "targets/py32f072x8.ld" +} diff --git a/targets/py32f072x8.ld b/targets/py32f072x8.ld new file mode 100644 index 0000000000..7e7e6b6b50 --- /dev/null +++ b/targets/py32f072x8.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x10000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x2000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f072x9.json b/targets/py32f072x9.json new file mode 100644 index 0000000000..df2d576087 --- /dev/null +++ b/targets/py32f072x9.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f072xx" + ], + "build-tags": [ + "py32f072x9" + ], + "linkerscript": "targets/py32f072x9.ld" +} diff --git a/targets/py32f072x9.ld b/targets/py32f072x9.ld new file mode 100644 index 0000000000..16b6fea7cf --- /dev/null +++ b/targets/py32f072x9.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x18000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x3000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f072xb.json b/targets/py32f072xb.json new file mode 100644 index 0000000000..93d8896ec7 --- /dev/null +++ b/targets/py32f072xb.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f072xx" + ], + "build-tags": [ + "py32f072xb" + ], + "linkerscript": "targets/py32f072xb.ld" +} diff --git a/targets/py32f072xb.ld b/targets/py32f072xb.ld new file mode 100644 index 0000000000..6cb6a79360 --- /dev/null +++ b/targets/py32f072xb.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x20000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x4000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f072xx.json b/targets/py32f072xx.json new file mode 100644 index 0000000000..7d81c6c7ca --- /dev/null +++ b/targets/py32f072xx.json @@ -0,0 +1,11 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32f072xx" + ], + "extra-files": [ + "src/device/py32/py32f072xx.s" + ] +} diff --git a/targets/py32f403xb.json b/targets/py32f403xb.json new file mode 100644 index 0000000000..9b541d2b15 --- /dev/null +++ b/targets/py32f403xb.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f403xx" + ], + "build-tags": [ + "py32f403xb" + ], + "linkerscript": "targets/py32f403xb.ld" +} diff --git a/targets/py32f403xb.ld b/targets/py32f403xb.ld new file mode 100644 index 0000000000..db51c3aec1 --- /dev/null +++ b/targets/py32f403xb.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x20000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x10000 +} + +_stack_size = 4K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f403xc.json b/targets/py32f403xc.json new file mode 100644 index 0000000000..97ff2548af --- /dev/null +++ b/targets/py32f403xc.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f403xx" + ], + "build-tags": [ + "py32f403xc" + ], + "linkerscript": "targets/py32f403xc.ld" +} diff --git a/targets/py32f403xc.ld b/targets/py32f403xc.ld new file mode 100644 index 0000000000..32c6af6ada --- /dev/null +++ b/targets/py32f403xc.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x40000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x10000 +} + +_stack_size = 4K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f403xd.json b/targets/py32f403xd.json new file mode 100644 index 0000000000..d7dab345f5 --- /dev/null +++ b/targets/py32f403xd.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f403xx" + ], + "build-tags": [ + "py32f403xd" + ], + "linkerscript": "targets/py32f403xd.ld" +} diff --git a/targets/py32f403xd.ld b/targets/py32f403xd.ld new file mode 100644 index 0000000000..902852917a --- /dev/null +++ b/targets/py32f403xd.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x60000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x10000 +} + +_stack_size = 4K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f403xx.json b/targets/py32f403xx.json new file mode 100644 index 0000000000..1afdd3eaf6 --- /dev/null +++ b/targets/py32f403xx.json @@ -0,0 +1,14 @@ +{ + "inherits": [ + "py32-m4" + ], + "build-tags": [ + "py32f403xx", + "py32_gpio_clock_ahb2", + "py32_no_hsi_fs", + "py32_uart_clock_apb2" + ], + "extra-files": [ + "src/device/py32/py32f403xx.s" + ] +} diff --git a/targets/py32f410xb.json b/targets/py32f410xb.json new file mode 100644 index 0000000000..0ba76798a8 --- /dev/null +++ b/targets/py32f410xb.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32f410xx" + ], + "build-tags": [ + "py32f410xb" + ], + "linkerscript": "targets/py32f410xb.ld" +} diff --git a/targets/py32f410xb.ld b/targets/py32f410xb.ld new file mode 100644 index 0000000000..6cb6a79360 --- /dev/null +++ b/targets/py32f410xb.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x20000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x4000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32f410xx.json b/targets/py32f410xx.json new file mode 100644 index 0000000000..154465b63e --- /dev/null +++ b/targets/py32f410xx.json @@ -0,0 +1,17 @@ +{ + "inherits": [ + "py32-m4" + ], + "build-tags": [ + "py32f410xx", + "py32_gpio_ospdder", + "py32_gpio_clock_ahb", + "py32_no_hsi_fs", + "py32_usart_unnumbered", + "py32_uart_clock_apb2", + "py32_uart_no_interrupt" + ], + "extra-files": [ + "src/device/py32/py32f410xx.s" + ] +} diff --git a/targets/py32l020x5.json b/targets/py32l020x5.json new file mode 100644 index 0000000000..ebd4245743 --- /dev/null +++ b/targets/py32l020x5.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32l020xx" + ], + "build-tags": [ + "py32l020x5" + ], + "linkerscript": "targets/py32l020x5.ld" +} diff --git a/targets/py32l020x5.ld b/targets/py32l020x5.ld new file mode 100644 index 0000000000..f0d8e67602 --- /dev/null +++ b/targets/py32l020x5.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x6000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0xc00 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32l020xx.json b/targets/py32l020xx.json new file mode 100644 index 0000000000..2f29798986 --- /dev/null +++ b/targets/py32l020xx.json @@ -0,0 +1,12 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32l020xx", + "py32_no_gpio_afrh" + ], + "extra-files": [ + "src/device/py32/py32l020xx.s" + ] +} diff --git a/targets/py32l090xb.json b/targets/py32l090xb.json new file mode 100644 index 0000000000..766063e5a6 --- /dev/null +++ b/targets/py32l090xb.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32l090xx" + ], + "build-tags": [ + "py32l090xb" + ], + "linkerscript": "targets/py32l090xb.ld" +} diff --git a/targets/py32l090xb.ld b/targets/py32l090xb.ld new file mode 100644 index 0000000000..6cb6a79360 --- /dev/null +++ b/targets/py32l090xb.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x20000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x4000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32l090xc.json b/targets/py32l090xc.json new file mode 100644 index 0000000000..d1b8c54a50 --- /dev/null +++ b/targets/py32l090xc.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32l090xx" + ], + "build-tags": [ + "py32l090xc" + ], + "linkerscript": "targets/py32l090xc.ld" +} diff --git a/targets/py32l090xc.ld b/targets/py32l090xc.ld new file mode 100644 index 0000000000..69587e3c5b --- /dev/null +++ b/targets/py32l090xc.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x40000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x8000 +} + +_stack_size = 4K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32l090xx.json b/targets/py32l090xx.json new file mode 100644 index 0000000000..fa6fe329b7 --- /dev/null +++ b/targets/py32l090xx.json @@ -0,0 +1,13 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32l090xx", + "py32_gpio_ospdder", + "py32_hsi_fs_op" + ], + "extra-files": [ + "src/device/py32/py32l090xx.s" + ] +} diff --git a/targets/py32m010x5.json b/targets/py32m010x5.json new file mode 100644 index 0000000000..0cdd961c21 --- /dev/null +++ b/targets/py32m010x5.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32m010xx" + ], + "build-tags": [ + "py32m010x5" + ], + "linkerscript": "targets/py32m010x5.ld" +} diff --git a/targets/py32m010x5.ld b/targets/py32m010x5.ld new file mode 100644 index 0000000000..f0d8e67602 --- /dev/null +++ b/targets/py32m010x5.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x6000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0xc00 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32m010xx.json b/targets/py32m010xx.json new file mode 100644 index 0000000000..9d604615e8 --- /dev/null +++ b/targets/py32m010xx.json @@ -0,0 +1,12 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32m010xx", + "py32_no_gpio_afrh" + ], + "extra-files": [ + "src/device/py32/py32m010xx.s" + ] +} diff --git a/targets/py32m020x6.json b/targets/py32m020x6.json new file mode 100644 index 0000000000..722e3f804f --- /dev/null +++ b/targets/py32m020x6.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32m020xx" + ], + "build-tags": [ + "py32m020x6" + ], + "linkerscript": "targets/py32m020x6.ld" +} diff --git a/targets/py32m020x6.ld b/targets/py32m020x6.ld new file mode 100644 index 0000000000..36be015b7f --- /dev/null +++ b/targets/py32m020x6.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x8000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x1000 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32m020xx.json b/targets/py32m020xx.json new file mode 100644 index 0000000000..de327e7ae4 --- /dev/null +++ b/targets/py32m020xx.json @@ -0,0 +1,11 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32m020xx" + ], + "extra-files": [ + "src/device/py32/py32m020xx.s" + ] +} diff --git a/targets/py32m030x8.json b/targets/py32m030x8.json new file mode 100644 index 0000000000..589d683124 --- /dev/null +++ b/targets/py32m030x8.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32m030xx" + ], + "build-tags": [ + "py32m030x8" + ], + "linkerscript": "targets/py32m030x8.ld" +} diff --git a/targets/py32m030x8.ld b/targets/py32m030x8.ld new file mode 100644 index 0000000000..7e7e6b6b50 --- /dev/null +++ b/targets/py32m030x8.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x10000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x2000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32m030xx.json b/targets/py32m030xx.json new file mode 100644 index 0000000000..bb1e547ddb --- /dev/null +++ b/targets/py32m030xx.json @@ -0,0 +1,11 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32m030xx" + ], + "extra-files": [ + "src/device/py32/py32m030xx.s" + ] +} diff --git a/targets/py32m031x8.json b/targets/py32m031x8.json new file mode 100644 index 0000000000..5157d418eb --- /dev/null +++ b/targets/py32m031x8.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32m031xx" + ], + "build-tags": [ + "py32m031x8" + ], + "linkerscript": "targets/py32m031x8.ld" +} diff --git a/targets/py32m031x8.ld b/targets/py32m031x8.ld new file mode 100644 index 0000000000..7e7e6b6b50 --- /dev/null +++ b/targets/py32m031x8.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x10000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x2000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32m031xx.json b/targets/py32m031xx.json new file mode 100644 index 0000000000..06ee608cc4 --- /dev/null +++ b/targets/py32m031xx.json @@ -0,0 +1,11 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32m031xx" + ], + "extra-files": [ + "src/device/py32/py32m031xx.s" + ] +} diff --git a/targets/py32m070cxb.json b/targets/py32m070cxb.json new file mode 100644 index 0000000000..072fbdd0cb --- /dev/null +++ b/targets/py32m070cxb.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32m070cxx" + ], + "build-tags": [ + "py32m070cxb" + ], + "linkerscript": "targets/py32m070cxb.ld" +} diff --git a/targets/py32m070cxb.ld b/targets/py32m070cxb.ld new file mode 100644 index 0000000000..6cb6a79360 --- /dev/null +++ b/targets/py32m070cxb.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x20000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x4000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32m070cxx.json b/targets/py32m070cxx.json new file mode 100644 index 0000000000..99c6f0762c --- /dev/null +++ b/targets/py32m070cxx.json @@ -0,0 +1,11 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32m070cxx" + ], + "extra-files": [ + "src/device/py32/py32m070cxx.s" + ] +} diff --git a/targets/py32m070xb.json b/targets/py32m070xb.json new file mode 100644 index 0000000000..aa77d3ecc6 --- /dev/null +++ b/targets/py32m070xb.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32m070xx" + ], + "build-tags": [ + "py32m070xb" + ], + "linkerscript": "targets/py32m070xb.ld" +} diff --git a/targets/py32m070xb.ld b/targets/py32m070xb.ld new file mode 100644 index 0000000000..6cb6a79360 --- /dev/null +++ b/targets/py32m070xb.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x20000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x4000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32m070xx.json b/targets/py32m070xx.json new file mode 100644 index 0000000000..4c969220c2 --- /dev/null +++ b/targets/py32m070xx.json @@ -0,0 +1,11 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32m070xx" + ], + "extra-files": [ + "src/device/py32/py32m070xx.s" + ] +} diff --git a/targets/py32md310x8.json b/targets/py32md310x8.json new file mode 100644 index 0000000000..849aadc41c --- /dev/null +++ b/targets/py32md310x8.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32md310xx" + ], + "build-tags": [ + "py32md310x8" + ], + "linkerscript": "targets/py32md310x8.ld" +} diff --git a/targets/py32md310x8.ld b/targets/py32md310x8.ld new file mode 100644 index 0000000000..7e7e6b6b50 --- /dev/null +++ b/targets/py32md310x8.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x10000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x2000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32md310xx.json b/targets/py32md310xx.json new file mode 100644 index 0000000000..5ca306e773 --- /dev/null +++ b/targets/py32md310xx.json @@ -0,0 +1,11 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32md310xx" + ], + "extra-files": [ + "src/device/py32/py32md310xx.s" + ] +} diff --git a/targets/py32md320x8.json b/targets/py32md320x8.json new file mode 100644 index 0000000000..44e23ea151 --- /dev/null +++ b/targets/py32md320x8.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32md320xx" + ], + "build-tags": [ + "py32md320x8" + ], + "linkerscript": "targets/py32md320x8.ld" +} diff --git a/targets/py32md320x8.ld b/targets/py32md320x8.ld new file mode 100644 index 0000000000..7e7e6b6b50 --- /dev/null +++ b/targets/py32md320x8.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x10000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x2000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32md320xx.json b/targets/py32md320xx.json new file mode 100644 index 0000000000..4f7682b468 --- /dev/null +++ b/targets/py32md320xx.json @@ -0,0 +1,11 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32md320xx" + ], + "extra-files": [ + "src/device/py32/py32md320xx.s" + ] +} diff --git a/targets/py32md410x8.json b/targets/py32md410x8.json new file mode 100644 index 0000000000..f306e878cc --- /dev/null +++ b/targets/py32md410x8.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32md410xx" + ], + "build-tags": [ + "py32md410x8" + ], + "linkerscript": "targets/py32md410x8.ld" +} diff --git a/targets/py32md410x8.ld b/targets/py32md410x8.ld new file mode 100644 index 0000000000..7e7e6b6b50 --- /dev/null +++ b/targets/py32md410x8.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x10000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x2000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32md410xx.json b/targets/py32md410xx.json new file mode 100644 index 0000000000..e51dacf417 --- /dev/null +++ b/targets/py32md410xx.json @@ -0,0 +1,11 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32md410xx" + ], + "extra-files": [ + "src/device/py32/py32md410xx.s" + ] +} diff --git a/targets/py32md420x8.json b/targets/py32md420x8.json new file mode 100644 index 0000000000..118afda153 --- /dev/null +++ b/targets/py32md420x8.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32md420xx" + ], + "build-tags": [ + "py32md420x8" + ], + "linkerscript": "targets/py32md420x8.ld" +} diff --git a/targets/py32md420x8.ld b/targets/py32md420x8.ld new file mode 100644 index 0000000000..7e7e6b6b50 --- /dev/null +++ b/targets/py32md420x8.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x10000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x2000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32md420xx.json b/targets/py32md420xx.json new file mode 100644 index 0000000000..239c8fd08e --- /dev/null +++ b/targets/py32md420xx.json @@ -0,0 +1,11 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32md420xx" + ], + "extra-files": [ + "src/device/py32/py32md420xx.s" + ] +} diff --git a/targets/py32md430x8.json b/targets/py32md430x8.json new file mode 100644 index 0000000000..f221113892 --- /dev/null +++ b/targets/py32md430x8.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32md430xx" + ], + "build-tags": [ + "py32md430x8" + ], + "linkerscript": "targets/py32md430x8.ld" +} diff --git a/targets/py32md430x8.ld b/targets/py32md430x8.ld new file mode 100644 index 0000000000..7e7e6b6b50 --- /dev/null +++ b/targets/py32md430x8.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x10000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x2000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32md430xx.json b/targets/py32md430xx.json new file mode 100644 index 0000000000..dedd024701 --- /dev/null +++ b/targets/py32md430xx.json @@ -0,0 +1,11 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32md430xx" + ], + "extra-files": [ + "src/device/py32/py32md430xx.s" + ] +} diff --git a/targets/py32t020bx5.json b/targets/py32t020bx5.json new file mode 100644 index 0000000000..dd4409ae1a --- /dev/null +++ b/targets/py32t020bx5.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32t020xx" + ], + "build-tags": [ + "py32t020bx5" + ], + "linkerscript": "targets/py32t020bx5.ld" +} diff --git a/targets/py32t020bx5.ld b/targets/py32t020bx5.ld new file mode 100644 index 0000000000..25062ef741 --- /dev/null +++ b/targets/py32t020bx5.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x5000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x800 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32t020bx6.json b/targets/py32t020bx6.json new file mode 100644 index 0000000000..3a9b95cd7c --- /dev/null +++ b/targets/py32t020bx6.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32t020xx" + ], + "build-tags": [ + "py32t020bx6" + ], + "linkerscript": "targets/py32t020bx6.ld" +} diff --git a/targets/py32t020bx6.ld b/targets/py32t020bx6.ld new file mode 100644 index 0000000000..36be015b7f --- /dev/null +++ b/targets/py32t020bx6.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x8000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x1000 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32t020x5.json b/targets/py32t020x5.json new file mode 100644 index 0000000000..7e4521536d --- /dev/null +++ b/targets/py32t020x5.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32t020xx" + ], + "build-tags": [ + "py32t020x5" + ], + "linkerscript": "targets/py32t020x5.ld" +} diff --git a/targets/py32t020x5.ld b/targets/py32t020x5.ld new file mode 100644 index 0000000000..25062ef741 --- /dev/null +++ b/targets/py32t020x5.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x5000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x800 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32t020x6.json b/targets/py32t020x6.json new file mode 100644 index 0000000000..ff9cb7c566 --- /dev/null +++ b/targets/py32t020x6.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32t020xx" + ], + "build-tags": [ + "py32t020x6" + ], + "linkerscript": "targets/py32t020x6.ld" +} diff --git a/targets/py32t020x6.ld b/targets/py32t020x6.ld new file mode 100644 index 0000000000..36be015b7f --- /dev/null +++ b/targets/py32t020x6.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x8000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x1000 +} + +_stack_size = 1K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32t020xx.json b/targets/py32t020xx.json new file mode 100644 index 0000000000..7764148fd0 --- /dev/null +++ b/targets/py32t020xx.json @@ -0,0 +1,12 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32t020xx", + "py32_uart_type" + ], + "extra-files": [ + "src/device/py32/py32t020xx.s" + ] +} diff --git a/targets/py32t090xb.json b/targets/py32t090xb.json new file mode 100644 index 0000000000..66740ccde9 --- /dev/null +++ b/targets/py32t090xb.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32t090xx" + ], + "build-tags": [ + "py32t090xb" + ], + "linkerscript": "targets/py32t090xb.ld" +} diff --git a/targets/py32t090xb.ld b/targets/py32t090xb.ld new file mode 100644 index 0000000000..6cb6a79360 --- /dev/null +++ b/targets/py32t090xb.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x20000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x4000 +} + +_stack_size = 2K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32t090xc.json b/targets/py32t090xc.json new file mode 100644 index 0000000000..6d640b13dc --- /dev/null +++ b/targets/py32t090xc.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32t090xx" + ], + "build-tags": [ + "py32t090xc" + ], + "linkerscript": "targets/py32t090xc.ld" +} diff --git a/targets/py32t090xc.ld b/targets/py32t090xc.ld new file mode 100644 index 0000000000..69587e3c5b --- /dev/null +++ b/targets/py32t090xc.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x40000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x8000 +} + +_stack_size = 4K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32t090xx.json b/targets/py32t090xx.json new file mode 100644 index 0000000000..5388f54716 --- /dev/null +++ b/targets/py32t090xx.json @@ -0,0 +1,13 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32t090xx", + "py32_gpio_ospdder", + "py32_hsi_fs_op" + ], + "extra-files": [ + "src/device/py32/py32t090xx.s" + ] +} diff --git a/targets/py32t092xc.json b/targets/py32t092xc.json new file mode 100644 index 0000000000..816c29039f --- /dev/null +++ b/targets/py32t092xc.json @@ -0,0 +1,9 @@ +{ + "inherits": [ + "py32t092xx" + ], + "build-tags": [ + "py32t092xc" + ], + "linkerscript": "targets/py32t092xc.ld" +} diff --git a/targets/py32t092xc.ld b/targets/py32t092xc.ld new file mode 100644 index 0000000000..69587e3c5b --- /dev/null +++ b/targets/py32t092xc.ld @@ -0,0 +1,9 @@ +MEMORY +{ + FLASH_TEXT (rx) : ORIGIN = 0x8000000, LENGTH = 0x40000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x8000 +} + +_stack_size = 4K; + +INCLUDE "targets/arm.ld" diff --git a/targets/py32t092xx.json b/targets/py32t092xx.json new file mode 100644 index 0000000000..b4b57b99d0 --- /dev/null +++ b/targets/py32t092xx.json @@ -0,0 +1,13 @@ +{ + "inherits": [ + "py32" + ], + "build-tags": [ + "py32t092xx", + "py32_gpio_ospdder", + "py32_hsi_fs_op" + ], + "extra-files": [ + "src/device/py32/py32t092xx.s" + ] +} diff --git a/testdata/py32-clock/main.go b/testdata/py32-clock/main.go new file mode 100644 index 0000000000..8d1913e910 --- /dev/null +++ b/testdata/py32-clock/main.go @@ -0,0 +1,30 @@ +package main + +import ( + "device/arm" + "machine" + "runtime/interrupt" + _ "unsafe" +) + +//go:linkname setCPUFrequency machine.setCPUFrequency +func setCPUFrequency(frequency uint32) + +// The application must establish and stabilize the hardware clock before +// calling clockChanged. +func clockChanged(frequency uint32, uartConfig machine.UARTConfig) error { + state := interrupt.Disable() + + setCPUFrequency(frequency) + if err := arm.SetupSystemTimer(frequency / 1000); err != nil { + interrupt.Restore(state) + return err + } + err := machine.DefaultUART.Configure(uartConfig) + interrupt.Restore(state) + return err +} + +func main() { + _ = clockChanged(machine.CPUFrequency(), machine.UARTConfig{}) +} diff --git a/testdata/py32-uart/f002b.go b/testdata/py32-uart/f002b.go new file mode 100644 index 0000000000..2bfa45a658 --- /dev/null +++ b/testdata/py32-uart/f002b.go @@ -0,0 +1,12 @@ +//go:build py32f002bxx + +package main + +import "machine" + +func configureUARTs() { + _ = machine.DefaultUART.Configure(machine.UARTConfig{ + TX: machine.PA3, + RX: machine.PA4, + }) +} diff --git a/testdata/py32-uart/f003_f030.go b/testdata/py32-uart/f003_f030.go new file mode 100644 index 0000000000..175c139714 --- /dev/null +++ b/testdata/py32-uart/f003_f030.go @@ -0,0 +1,16 @@ +//go:build py32f003xx || py32f030xx + +package main + +import "machine" + +func configureUARTs() { + _ = machine.DefaultUART.Configure(machine.UARTConfig{ + TX: machine.PA2, + RX: machine.PA3, + }) + _ = machine.UART2.Configure(machine.UARTConfig{ + TX: machine.PA0, + RX: machine.PA1, + }) +} diff --git a/testdata/py32-uart/main.go b/testdata/py32-uart/main.go new file mode 100644 index 0000000000..7442baa026 --- /dev/null +++ b/testdata/py32-uart/main.go @@ -0,0 +1,5 @@ +package main + +func main() { + configureUARTs() +} diff --git a/tools/gen-device-svd/gen-device-svd.go b/tools/gen-device-svd/gen-device-svd.go index ef9dedff97..6c5e78ed81 100755 --- a/tools/gen-device-svd/gen-device-svd.go +++ b/tools/gen-device-svd/gen-device-svd.go @@ -668,12 +668,12 @@ func parseBitfields(groupName, regName string, fieldEls []*SVDField, bitfieldPre // try use bitRange // example string: "[20:16]" parts := strings.Split(strings.Trim(*fieldEl.BitRange, "[]"), ":") - l, err := strconv.ParseUint(parts[1], 0, 32) + l, err := strconv.ParseUint(parts[1], 10, 32) if err != nil { panic(err) } lsb = uint32(l) - m, err := strconv.ParseUint(parts[0], 0, 32) + m, err := strconv.ParseUint(parts[0], 10, 32) if err != nil { panic(err) } @@ -1281,7 +1281,7 @@ const ( {{- "\n"}} {{- end}} // Highest interrupt number on this device. - IRQ_max = {{.interruptMax}} + IRQ_max = {{.interruptMax}} ) // Pseudo function call that is replaced by the compiler with the actual diff --git a/tools/gen-py32-targets/README.md b/tools/gen-py32-targets/README.md new file mode 100644 index 0000000000..9c4f099d00 --- /dev/null +++ b/tools/gen-py32-targets/README.md @@ -0,0 +1,59 @@ +# PY32 target generator + +This command generates TinyGo target JSON and linker scripts for Puya PY32 +microcontrollers. Run it from the repository root: + +```sh +make gen-target-py32 +``` + +The normalized [device table](devices.csv) was derived from the `` and +`` leaves in the official Puya CMSIS-Pack PDSC files. Memory values are +the inherited default `IROM1` and `IRAM1` regions. The three PY32E407 parts have +multiple adjacent default RAM regions; their linker definitions combine those +regions into one contiguous RAM range. + +The table contains 87 concrete devices associated with 40 SVD families. The +pack also supplies `PY32F001xx.svd` without a corresponding PDSC device, so the +generator creates its family target but cannot create a concrete memory target. +Together these inputs produce family targets for all 41 available SVDs. + +Cortex-M0+ families inherit `py32`; PY32E407, PY32F403, and PY32F410 families +inherit `py32-m4`, which uses TinyGo's standard soft-float Cortex-M4 ABI. Targets +whose SVD has no `GPIO.AFRH` register receive the `py32_no_gpio_afrh` build tag. + +Puya's SVDs are inconsistent about GPIO `groupName`: some describe identical +ports as `GPIOA_Type`, `GPIOB_Type`, and so on, while others use one +`GPIO_Type`. The `py32-svd` updater validates the register structures and +patches the published SVDs to use the common `GPIO` group. This is a correction +to the vendor metadata, not a target capability, so neither TinyGo's generic +SVD generator nor the target build tags need PY32-specific handling for it. + +Real register-layout differences are selected by generated capability tags. +These cover the `OSPEEDR`/`OSPDDER` GPIO spelling, RCC GPIO and UART clock +registers, `USART` versus `UART` blocks, split USART receive/transmit data +registers, and HSI selector availability. Keep these classifications in the +target generator rather than adding long family expressions to machine files. + +All concrete target JSON files and linker scripts are generated so inheritance, +memory definitions, and stack sizes remain consistent. Verified flashing +commands are preserved in the generator; other targets omit them until a +compatible programmer identifier is known. + +The system and interrupt stack is sized from available RAM: targets with up to +4 KiB use 1 KiB, targets with up to 16 KiB use 2 KiB, and larger targets use +4 KiB. This linker-defined stack is distinct from goroutine fallback stacks +selected by TinyGo's `--stack-size` option. + +## Machine support status + +A minimal program compiles for all 87 concrete targets. GPIO, RCC, runtime +clock setup, and the default serial block are selected according to each SVD's +register layout. This is compile-time coverage, not hardware validation for +every device. In particular, PY32F410 SVD interrupt metadata stops before the +serial interrupts, so its default USART is configured without receive +interrupts rather than assigning an unverified IRQ number. The M4 SVDs also do +not expose the M0+ `ICSCR.HSI_FS` selector, so the runtime preserves their reset +clock configuration and initially reports the vendor-defined 8 MHz reset +frequency. Custom clock HALs must update TinyGo's internal clock state, then +reconfigure SysTick and frequency-dependent peripherals. \ No newline at end of file diff --git a/tools/gen-py32-targets/devices.csv b/tools/gen-py32-targets/devices.csv new file mode 100644 index 0000000000..4d36f38307 --- /dev/null +++ b/tools/gen-py32-targets/devices.csv @@ -0,0 +1,88 @@ +part,family,core,flash_start,flash_size,ram_start,ram_size +py32e407xc,py32e407xx,m4,0x08000000,0x40000,0x20000000,0x1c000 +py32e407xd,py32e407xx,m4,0x08000000,0x60000,0x20000000,0x24000 +py32e407xe,py32e407xx,m4,0x08000000,0x80000,0x20000000,0x24000 +py32f001cx4,py32f001cxx,m0,0x08000000,0x4000,0x20000000,0xc00 +py32f002ax5,py32f002axx,m0,0x08000000,0x5000,0x20000000,0xc00 +py32f002bx5,py32f002bxx,m0,0x08000000,0x6000,0x20000000,0xc00 +py32f002cx5,py32f002cxx,m0,0x08000000,0x8000,0x20000000,0xc00 +py32f002xx2,py32f002xxx,m0,0x08000000,0x2000,0x20000000,0xc00 +py32f002xx4,py32f002xxx,m0,0x08000000,0x4000,0x20000000,0xc00 +py32f002xx5,py32f002xxx,m0,0x08000000,0x6000,0x20000000,0xc00 +py32f002zx4,py32f002zxx,m0,0x08000000,0x4000,0x20000000,0xc00 +py32f003x4,py32f003xx,m0,0x08000000,0x4000,0x20000000,0x800 +py32f003x6,py32f003xx,m0,0x08000000,0x8000,0x20000000,0x1000 +py32f003x7,py32f003xx,m0,0x08000000,0xc000,0x20000000,0x1800 +py32f003x8,py32f003xx,m0,0x08000000,0x10000,0x20000000,0x2000 +py32f021x8,py32f021xx,m0,0x08000000,0x10000,0x20000000,0x2000 +py32f030x4,py32f030xx,m0,0x08000000,0x4000,0x20000000,0x800 +py32f030x6,py32f030xx,m0,0x08000000,0x8000,0x20000000,0x1000 +py32f030x7,py32f030xx,m0,0x08000000,0xc000,0x20000000,0x1800 +py32f030x8,py32f030xx,m0,0x08000000,0x10000,0x20000000,0x2000 +py32f031x4,py32f031xx,m0,0x08000000,0x4000,0x20000000,0x800 +py32f031x6,py32f031xx,m0,0x08000000,0x8000,0x20000000,0x1000 +py32f031x7,py32f031xx,m0,0x08000000,0xc000,0x20000000,0x1800 +py32f031x8,py32f031xx,m0,0x08000000,0x10000,0x20000000,0x2000 +py32f032x8,py32f032xx,m0,0x08000000,0x10000,0x20000000,0x2000 +py32f040cx6,py32f040cxx,m0,0x08000000,0x8000,0x20000000,0x1000 +py32f040cx8,py32f040cxx,m0,0x08000000,0x10000,0x20000000,0x2000 +py32f040cx9,py32f040cxx,m0,0x08000000,0x18000,0x20000000,0x3000 +py32f040cxb,py32f040cxx,m0,0x08000000,0x20000,0x20000000,0x4000 +py32f040epxb,py32f040epxx,m0,0x08000000,0x20000,0x20000000,0x4000 +py32f040ex6,py32f040exx,m0,0x08000000,0x8000,0x20000000,0x1000 +py32f040ex8,py32f040exx,m0,0x08000000,0x10000,0x20000000,0x2000 +py32f040ex9,py32f040exx,m0,0x08000000,0x18000,0x20000000,0x3000 +py32f040exb,py32f040exx,m0,0x08000000,0x20000,0x20000000,0x4000 +py32f040x6,py32f040xx,m0,0x08000000,0x8000,0x20000000,0x1000 +py32f040x8,py32f040xx,m0,0x08000000,0x10000,0x20000000,0x2000 +py32f040x9,py32f040xx,m0,0x08000000,0x18000,0x20000000,0x3000 +py32f040xb,py32f040xx,m0,0x08000000,0x20000,0x20000000,0x4000 +py32f071cx6,py32f071cxx,m0,0x08000000,0x8000,0x20000000,0x1000 +py32f071cx8,py32f071cxx,m0,0x08000000,0x10000,0x20000000,0x2000 +py32f071cx9,py32f071cxx,m0,0x08000000,0x18000,0x20000000,0x3000 +py32f071cxb,py32f071cxx,m0,0x08000000,0x20000,0x20000000,0x4000 +py32f071ex6,py32f071exx,m0,0x08000000,0x8000,0x20000000,0x1000 +py32f071ex8,py32f071exx,m0,0x08000000,0x10000,0x20000000,0x2000 +py32f071ex9,py32f071exx,m0,0x08000000,0x18000,0x20000000,0x3000 +py32f071exb,py32f071exx,m0,0x08000000,0x20000,0x20000000,0x4000 +py32f071x6,py32f071xx,m0,0x08000000,0x8000,0x20000000,0x1000 +py32f071x8,py32f071xx,m0,0x08000000,0x10000,0x20000000,0x2000 +py32f071x9,py32f071xx,m0,0x08000000,0x18000,0x20000000,0x3000 +py32f071xb,py32f071xx,m0,0x08000000,0x20000,0x20000000,0x4000 +py32f072cx6,py32f072cxx,m0,0x08000000,0x8000,0x20000000,0x1000 +py32f072cx8,py32f072cxx,m0,0x08000000,0x10000,0x20000000,0x2000 +py32f072cx9,py32f072cxx,m0,0x08000000,0x18000,0x20000000,0x3000 +py32f072cxb,py32f072cxx,m0,0x08000000,0x20000,0x20000000,0x4000 +py32f072ex6,py32f072exx,m0,0x08000000,0x8000,0x20000000,0x1000 +py32f072ex8,py32f072exx,m0,0x08000000,0x10000,0x20000000,0x2000 +py32f072ex9,py32f072exx,m0,0x08000000,0x18000,0x20000000,0x3000 +py32f072exb,py32f072exx,m0,0x08000000,0x20000,0x20000000,0x4000 +py32f072x6,py32f072xx,m0,0x08000000,0x8000,0x20000000,0x1000 +py32f072x8,py32f072xx,m0,0x08000000,0x10000,0x20000000,0x2000 +py32f072x9,py32f072xx,m0,0x08000000,0x18000,0x20000000,0x3000 +py32f072xb,py32f072xx,m0,0x08000000,0x20000,0x20000000,0x4000 +py32f403xb,py32f403xx,m4,0x08000000,0x20000,0x20000000,0x10000 +py32f403xc,py32f403xx,m4,0x08000000,0x40000,0x20000000,0x10000 +py32f403xd,py32f403xx,m4,0x08000000,0x60000,0x20000000,0x10000 +py32f410xb,py32f410xx,m4,0x08000000,0x20000,0x20000000,0x4000 +py32l020x5,py32l020xx,m0,0x08000000,0x6000,0x20000000,0xc00 +py32l090xb,py32l090xx,m0,0x08000000,0x20000,0x20000000,0x4000 +py32l090xc,py32l090xx,m0,0x08000000,0x40000,0x20000000,0x8000 +py32m010x5,py32m010xx,m0,0x08000000,0x6000,0x20000000,0xc00 +py32m020x6,py32m020xx,m0,0x08000000,0x8000,0x20000000,0x1000 +py32m030x8,py32m030xx,m0,0x08000000,0x10000,0x20000000,0x2000 +py32m031x8,py32m031xx,m0,0x08000000,0x10000,0x20000000,0x2000 +py32m070cxb,py32m070cxx,m0,0x08000000,0x20000,0x20000000,0x4000 +py32m070xb,py32m070xx,m0,0x08000000,0x20000,0x20000000,0x4000 +py32md310x8,py32md310xx,m0,0x08000000,0x10000,0x20000000,0x2000 +py32md320x8,py32md320xx,m0,0x08000000,0x10000,0x20000000,0x2000 +py32md410x8,py32md410xx,m0,0x08000000,0x10000,0x20000000,0x2000 +py32md420x8,py32md420xx,m0,0x08000000,0x10000,0x20000000,0x2000 +py32md430x8,py32md430xx,m0,0x08000000,0x10000,0x20000000,0x2000 +py32t020bx5,py32t020xx,m0,0x08000000,0x5000,0x20000000,0x800 +py32t020bx6,py32t020xx,m0,0x08000000,0x8000,0x20000000,0x1000 +py32t020x5,py32t020xx,m0,0x08000000,0x5000,0x20000000,0x800 +py32t020x6,py32t020xx,m0,0x08000000,0x8000,0x20000000,0x1000 +py32t090xb,py32t090xx,m0,0x08000000,0x20000,0x20000000,0x4000 +py32t090xc,py32t090xx,m0,0x08000000,0x40000,0x20000000,0x8000 +py32t092xc,py32t092xx,m0,0x08000000,0x40000,0x20000000,0x8000 diff --git a/tools/gen-py32-targets/main.go b/tools/gen-py32-targets/main.go new file mode 100644 index 0000000000..e0a159447d --- /dev/null +++ b/tools/gen-py32-targets/main.go @@ -0,0 +1,254 @@ +// Command gen-py32-targets generates PY32 target and linker definitions from +// normalized CMSIS-Pack device metadata. +package main + +import ( + "encoding/csv" + "encoding/json" + "errors" + "flag" + "fmt" + "io" + "os" + "path/filepath" + "sort" + "strconv" + "strings" +) + +type device struct { + Part string + Family string + Core string + FlashStart uint64 + FlashSize uint64 + RAMStart uint64 + RAMSize uint64 +} + +type target struct { + Inherits []string `json:"inherits"` + BuildTags []string `json:"build-tags,omitempty"` + LinkerScript string `json:"linkerscript,omitempty"` + ExtraFiles []string `json:"extra-files,omitempty"` + FlashCommand string `json:"flash-command,omitempty"` +} + +var orphanFamilies = map[string]string{ + // This SVD is present in PY32F0xx_DFP, but that pack has no matching PDSC + // device entry from which a concrete memory configuration can be derived. + "py32f001xx": "m0", +} + +var noGPIOAFRH = map[string]bool{ + "py32f001cxx": true, + "py32f002bxx": true, + "py32f002cxx": true, + "py32f002xxx": true, + "py32f002zxx": true, + "py32l020xx": true, + "py32m010xx": true, +} + +var gpioOSPDDER = familySet("py32e407xx", "py32f410xx", "py32l090xx", "py32t090xx", "py32t092xx") +var gpioClockAHB2 = familySet("py32e407xx", "py32f403xx") +var gpioClockAHB = familySet("py32f410xx") +var hsiFSOP = familySet("py32l090xx", "py32t090xx", "py32t092xx") +var noHSIFS = familySet("py32e407xx", "py32f403xx", "py32f410xx") +var uartType = familySet("py32t020xx") +var usartSplitData = familySet("py32e407xx") +var usartUnnumbered = familySet("py32f410xx") +var usart1ClockLiteral = familySet("py32f001cxx", "py32f001xx") +var uartClockAPB2 = familySet("py32e407xx", "py32f403xx", "py32f410xx") +var uartNoInterrupt = familySet("py32f410xx") + +func familySet(names ...string) map[string]bool { + set := make(map[string]bool, len(names)) + for _, name := range names { + set[name] = true + } + return set +} + +func familyBuildTags(family string) []string { + tags := []string{family} + features := []struct { + name string + set map[string]bool + }{ + {"py32_no_gpio_afrh", noGPIOAFRH}, + {"py32_gpio_ospdder", gpioOSPDDER}, + {"py32_gpio_clock_ahb2", gpioClockAHB2}, + {"py32_gpio_clock_ahb", gpioClockAHB}, + {"py32_hsi_fs_op", hsiFSOP}, + {"py32_no_hsi_fs", noHSIFS}, + {"py32_uart_type", uartType}, + {"py32_usart_split_data", usartSplitData}, + {"py32_usart_unnumbered", usartUnnumbered}, + {"py32_usart1_clock_literal", usart1ClockLiteral}, + {"py32_uart_clock_apb2", uartClockAPB2}, + {"py32_uart_no_interrupt", uartNoInterrupt}, + } + for _, feature := range features { + if feature.set[family] { + tags = append(tags, feature.name) + } + } + return tags +} + +var flashCommands = map[string]string{ + "py32f002ax5": "pyocd load -t py32f002ax5 {bin}", + "py32f002bx5": "pyocd load -t py32f002bx5 {bin}", + "py32f003x4": "pyocd load -t py32f003x4 {bin}", + "py32f003x6": "pyocd load -t py32f003x6 {bin}", + "py32f003x7": "pyocd load -t py32f003x7 {bin}", + "py32f003x8": "pyocd load -t py32f003x8 {bin}", + "py32f030x4": "pyocd load -t py32f030x4 {bin}", + "py32f030x6": "pyocd load -t py32f030x6 {bin}", + "py32f030x7": "pyocd load -t py32f030x7 {bin}", + "py32f030x8": "pyocd load -t py32f030x8 {bin}", +} + +func main() { + table := flag.String("table", "tools/gen-py32-targets/devices.csv", "normalized device table") + out := flag.String("out", "targets", "target output directory") + flag.Parse() + + devices, err := readDevices(*table) + if err != nil { + fatal(err) + } + if err := generate(*out, devices); err != nil { + fatal(err) + } +} + +func fatal(err error) { + fmt.Fprintln(os.Stderr, "gen-py32-targets:", err) + os.Exit(1) +} + +func readDevices(path string) ([]device, error) { + file, err := os.Open(path) + if err != nil { + return nil, err + } + defer file.Close() + + reader := csv.NewReader(file) + header, err := reader.Read() + if err != nil { + return nil, err + } + wantHeader := []string{"part", "family", "core", "flash_start", "flash_size", "ram_start", "ram_size"} + if strings.Join(header, ",") != strings.Join(wantHeader, ",") { + return nil, fmt.Errorf("unexpected CSV header %q", strings.Join(header, ",")) + } + + var devices []device + seen := make(map[string]bool) + for line := 2; ; line++ { + record, err := reader.Read() + if errors.Is(err, io.EOF) { + break + } + if err != nil { + return nil, fmt.Errorf("line %d: %w", line, err) + } + if seen[record[0]] { + return nil, fmt.Errorf("line %d: duplicate part %q", line, record[0]) + } + seen[record[0]] = true + if record[2] != "m0" && record[2] != "m4" { + return nil, fmt.Errorf("line %d: unsupported core %q", line, record[2]) + } + values := make([]uint64, 4) + for i, field := range record[3:] { + values[i], err = strconv.ParseUint(field, 0, 64) + if err != nil || values[i] == 0 { + return nil, fmt.Errorf("line %d: invalid memory value %q", line, field) + } + } + devices = append(devices, device{ + Part: record[0], Family: record[1], Core: record[2], + FlashStart: values[0], FlashSize: values[1], + RAMStart: values[2], RAMSize: values[3], + }) + } + return devices, nil +} + +func systemStackSize(ramSize uint64) uint64 { + switch { + case ramSize <= 4*1024: + return 1024 + case ramSize <= 16*1024: + return 2 * 1024 + default: + return 4 * 1024 + } +} + +func generate(out string, devices []device) error { + if err := os.MkdirAll(out, 0o755); err != nil { + return err + } + families := make(map[string]string, len(orphanFamilies)) + for name, core := range orphanFamilies { + families[name] = core + } + for _, device := range devices { + if core, ok := families[device.Family]; ok && core != device.Core { + return fmt.Errorf("family %q mixes %s and %s cores", device.Family, core, device.Core) + } + families[device.Family] = device.Core + } + + familyNames := make([]string, 0, len(families)) + for name := range families { + familyNames = append(familyNames, name) + } + sort.Strings(familyNames) + for _, family := range familyNames { + base := "py32" + if families[family] == "m4" { + base = "py32-m4" + } + spec := target{ + Inherits: []string{base}, + BuildTags: familyBuildTags(family), + ExtraFiles: []string{"src/device/py32/" + family + ".s"}, + } + if err := writeJSON(filepath.Join(out, family+".json"), spec); err != nil { + return err + } + } + + for _, device := range devices { + spec := target{ + Inherits: []string{device.Family}, + BuildTags: []string{device.Part}, + LinkerScript: "targets/" + device.Part + ".ld", + FlashCommand: flashCommands[device.Part], + } + if err := writeJSON(filepath.Join(out, device.Part+".json"), spec); err != nil { + return err + } + stackSize := systemStackSize(device.RAMSize) + linker := fmt.Sprintf("MEMORY\n{\n FLASH_TEXT (rx) : ORIGIN = %#x, LENGTH = %#x\n RAM (xrw) : ORIGIN = %#x, LENGTH = %#x\n}\n\n_stack_size = %dK;\n\nINCLUDE \"targets/arm.ld\"\n", device.FlashStart, device.FlashSize, device.RAMStart, device.RAMSize, stackSize/1024) + if err := os.WriteFile(filepath.Join(out, device.Part+".ld"), []byte(linker), 0o644); err != nil { + return err + } + } + return nil +} + +func writeJSON(path string, value any) error { + data, err := json.MarshalIndent(value, "", " ") + if err != nil { + return err + } + data = append(data, '\n') + return os.WriteFile(path, data, 0o644) +} diff --git a/tools/gen-py32-targets/main_test.go b/tools/gen-py32-targets/main_test.go new file mode 100644 index 0000000000..6d93caacf6 --- /dev/null +++ b/tools/gen-py32-targets/main_test.go @@ -0,0 +1,158 @@ +package main + +import ( + "encoding/json" + "os" + "path/filepath" + "strings" + "testing" +) + +func TestDeviceTable(t *testing.T) { + devices, err := readDevices("devices.csv") + if err != nil { + t.Fatal(err) + } + if got, want := len(devices), 87; got != want { + t.Fatalf("got %d concrete devices, want %d", got, want) + } + + families := make(map[string]bool) + for family := range orphanFamilies { + families[family] = true + } + m4 := 0 + for _, device := range devices { + families[device.Family] = true + if device.Core == "m4" { + m4++ + } + } + if got, want := len(families), 41; got != want { + t.Fatalf("got %d SVD families, want %d", got, want) + } + if got, want := m4, 7; got != want { + t.Fatalf("got %d Cortex-M4 devices, want %d", got, want) + } +} + +func TestSystemStackSize(t *testing.T) { + tests := []struct { + ramSize uint64 + want uint64 + }{ + {2 * 1024, 1024}, + {4 * 1024, 1024}, + {4*1024 + 1, 2 * 1024}, + {16 * 1024, 2 * 1024}, + {16*1024 + 1, 4 * 1024}, + {144 * 1024, 4 * 1024}, + } + for _, test := range tests { + if got := systemStackSize(test.ramSize); got != test.want { + t.Errorf("systemStackSize(%d) = %d, want %d", test.ramSize, got, test.want) + } + } +} + +func TestGenerate(t *testing.T) { + devices, err := readDevices("devices.csv") + if err != nil { + t.Fatal(err) + } + out := t.TempDir() + if err := generate(out, devices); err != nil { + t.Fatal(err) + } + + entries, err := os.ReadDir(out) + if err != nil { + t.Fatal(err) + } + // 41 family JSON files, 87 generated concrete JSON files, and linker + // scripts for all 87 concrete targets. + if got, want := len(entries), 215; got != want { + t.Fatalf("generated %d files, want %d", got, want) + } + + checkTarget(t, filepath.Join(out, "py32e407xc.json"), "py32e407xx", "targets/py32e407xc.ld", "") + checkTarget(t, filepath.Join(out, "py32f001xx.json"), "py32", "", "") + checkTarget(t, filepath.Join(out, "py32f002ax5.json"), "py32f002axx", "targets/py32f002ax5.ld", "pyocd load -t py32f002ax5 {bin}") + checkTarget(t, filepath.Join(out, "py32f030x8.json"), "py32f030xx", "targets/py32f030x8.ld", "pyocd load -t py32f030x8 {bin}") + checkTarget(t, filepath.Join(out, "py32f410xx.json"), "py32-m4", "", "") + checkBuildTags(t, filepath.Join(out, "py32e407xx.json"), "py32e407xx", "py32_gpio_ospdder", "py32_gpio_clock_ahb2", "py32_no_hsi_fs", "py32_usart_split_data", "py32_uart_clock_apb2") + checkBuildTags(t, filepath.Join(out, "py32f001cxx.json"), "py32f001cxx", "py32_no_gpio_afrh", "py32_usart1_clock_literal") + checkBuildTags(t, filepath.Join(out, "py32f001xx.json"), "py32f001xx", "py32_usart1_clock_literal") + checkBuildTags(t, filepath.Join(out, "py32f002cxx.json"), "py32f002cxx", "py32_no_gpio_afrh") + checkBuildTags(t, filepath.Join(out, "py32f032xx.json"), "py32f032xx") + checkBuildTags(t, filepath.Join(out, "py32f410xx.json"), "py32f410xx", "py32_gpio_ospdder", "py32_gpio_clock_ahb", "py32_no_hsi_fs", "py32_usart_unnumbered", "py32_uart_clock_apb2", "py32_uart_no_interrupt") + checkBuildTags(t, filepath.Join(out, "py32t020xx.json"), "py32t020xx", "py32_uart_type") + + data, err := os.ReadFile(filepath.Join(out, "py32e407xc.ld")) + if err != nil { + t.Fatal(err) + } + want := "ORIGIN = 0x20000000, LENGTH = 0x1c000" + if !contains(string(data), want) { + t.Fatalf("E407 linker script does not contain combined contiguous RAM %q", want) + } + checkFileContains(t, filepath.Join(out, "py32f002ax5.ld"), "_stack_size = 1K;") + checkFileContains(t, filepath.Join(out, "py32f030x8.ld"), "_stack_size = 2K;") + checkFileContains(t, filepath.Join(out, "py32l090xc.ld"), "_stack_size = 4K;") +} + +func checkFileContains(t *testing.T, path, want string) { + t.Helper() + data, err := os.ReadFile(path) + if err != nil { + t.Fatal(err) + } + if !strings.Contains(string(data), want) { + t.Errorf("%s does not contain %q", path, want) + } +} + +func checkBuildTags(t *testing.T, path string, want ...string) { + t.Helper() + data, err := os.ReadFile(path) + if err != nil { + t.Fatal(err) + } + var spec target + if err := json.Unmarshal(data, &spec); err != nil { + t.Fatal(err) + } + if got := strings.Join(spec.BuildTags, ","); got != strings.Join(want, ",") { + t.Errorf("%s build tags are %q, want %q", path, got, strings.Join(want, ",")) + } +} + +func checkTarget(t *testing.T, path, inherited, linker, flashCommand string) { + t.Helper() + data, err := os.ReadFile(path) + if err != nil { + t.Fatal(err) + } + var spec target + if err := json.Unmarshal(data, &spec); err != nil { + t.Fatal(err) + } + if len(spec.Inherits) != 1 || spec.Inherits[0] != inherited { + t.Errorf("%s inherits %v, want %q", path, spec.Inherits, inherited) + } + if spec.LinkerScript != linker { + t.Errorf("%s linker script is %q, want %q", path, spec.LinkerScript, linker) + } + if spec.FlashCommand != flashCommand { + t.Errorf("%s flash command is %q, want %q", path, spec.FlashCommand, flashCommand) + } +} + +func contains(value, substring string) bool { + for i := 0; i+len(substring) <= len(value); i++ { + if value[i:i+len(substring)] == substring { + return true + } + } + return false +}