Version: 1.0 | Date: 2026-06-30 | Status: Draft
Executive Summary
Problem Statement: Our internal test harness is capable of building tests, but we currently lack a mechanism or infrastructure to execute these tests on real hardware within the company. This creates a validation bottleneck for certifying our frameworks on dev boards.
Project Goal: Build a standardized image that ingests a hardware configuration file and dynamically outputs a comprehensive execution package of tests that can be handed off to external vendors for physical hardware run-time execution.
Target Parent Community: RISC-V ACT (Architectural Compatibility Test) Team or the CSC (Certification Steering Committee) ecosystem. (Note: Given it's for running "certs", aligning it with the ACT/CSC repository conventions makes the most sense).
AI Usage/Expectation: No restrictions on using AI tools to assist in creating metadata, schemas, or documentation.
Copyright/Patent Concerns: Standard open-source licensing (e.g., Apache 2.0 / CC-BY-4.0) with no IP concerns.
Roles & Staffing
Project Lead (Mentor): [Name/Email]
Primary Contributor (Mentees): [Name/Email]
Stakeholder Sponsor: [Name/Department]
Estimated Effort: [e.g., 10 hours/week for 12 weeks]
Phased Build Plan
Phase 1
Setup & Initial PR
Repository initialized; YAML/JSON schema for the hardware configuration file defined and approved.
Phase 2
Core Logic / Feature
Tooling successfully parses the configuration file and outputs the test bundles. Verified natively or via emulator where possible (e.g., Spike/QEMU) to ensure it’s not DOA.
Phase 3
Upstream / Integration
Submit PR with final automation scripts, image build recipes, and documentation to the parent community project.
Phase 4
Documentation & Demo
Create a vendor play-book guide on how to ingest the outputted test bundle on physical hardware; record demo video; earn LF Badges.
Graduation & Exit Strategy
Select the intended path for this project upon completion:
[X] Upstream: Merge framework code directly into an existing test-suite or architecture-test mainline.
[X] Hand-off: Formal transition to the ACT (Architectural Compatibility Test) SIG or Ecosystem Labs for ongoing execution.
[ ] Incubate: Move toward a formal LF/Eclipse Project.
[ ] Other: [Specify]
Maintenance & Support
Post-Graduation Owner: (Who looks after this code once the short-term sprint ends?)
Sunset Criteria: (At what point do we agree to archive this project if interest/staffing fails?)
Recognition & Badging
Earnable Badges for this SOW:
[X] First PR Milestone
[X] Upstream Navigator
[X] Dev Partner Project Graduate
Publicity Plan:
Featured article on the RISC-V International Blog
Technical deep-dive demonstration to the ACT4 Team
Potential presentation or lightning talk submission for the RISC-V Summit
Version: 1.0 | Date: 2026-06-30 | Status: Draft
Executive Summary
Problem Statement: Our internal test harness is capable of building tests, but we currently lack a mechanism or infrastructure to execute these tests on real hardware within the company. This creates a validation bottleneck for certifying our frameworks on dev boards.
Project Goal: Build a standardized image that ingests a hardware configuration file and dynamically outputs a comprehensive execution package of tests that can be handed off to external vendors for physical hardware run-time execution.
Target Parent Community: RISC-V ACT (Architectural Compatibility Test) Team or the CSC (Certification Steering Committee) ecosystem. (Note: Given it's for running "certs", aligning it with the ACT/CSC repository conventions makes the most sense).
AI Usage/Expectation: No restrictions on using AI tools to assist in creating metadata, schemas, or documentation.
Copyright/Patent Concerns: Standard open-source licensing (e.g., Apache 2.0 / CC-BY-4.0) with no IP concerns.
Roles & Staffing
Project Lead (Mentor): [Name/Email]
Primary Contributor (Mentees): [Name/Email]
Stakeholder Sponsor: [Name/Department]
Estimated Effort: [e.g., 10 hours/week for 12 weeks]
Phased Build Plan
Phase 1
Setup & Initial PR
Repository initialized; YAML/JSON schema for the hardware configuration file defined and approved.
Phase 2
Core Logic / Feature
Tooling successfully parses the configuration file and outputs the test bundles. Verified natively or via emulator where possible (e.g., Spike/QEMU) to ensure it’s not DOA.
Phase 3
Upstream / Integration
Submit PR with final automation scripts, image build recipes, and documentation to the parent community project.
Phase 4
Documentation & Demo
Create a vendor play-book guide on how to ingest the outputted test bundle on physical hardware; record demo video; earn LF Badges.
Graduation & Exit Strategy
Select the intended path for this project upon completion:
[X] Upstream: Merge framework code directly into an existing test-suite or architecture-test mainline.
[X] Hand-off: Formal transition to the ACT (Architectural Compatibility Test) SIG or Ecosystem Labs for ongoing execution.
[ ] Incubate: Move toward a formal LF/Eclipse Project.
[ ] Other: [Specify]
Maintenance & Support
Post-Graduation Owner: (Who looks after this code once the short-term sprint ends?)
Sunset Criteria: (At what point do we agree to archive this project if interest/staffing fails?)
Recognition & Badging
Earnable Badges for this SOW:
[X] First PR Milestone
[X] Upstream Navigator
[X] Dev Partner Project Graduate
Publicity Plan:
Featured article on the RISC-V International Blog
Technical deep-dive demonstration to the ACT4 Team
Potential presentation or lightning talk submission for the RISC-V Summit