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[Bug] pto.ldg/pto.stg outside pto.simt_entry pass verification but crash Bisheng #1032

Description

@W4termy

Component

Passes / Transforms (lib/PTO/Transforms)

Description

TileLang needs scalar GM accesses with data-cache bypass outside a SIMD/SIMT
region. It currently lowers those accesses to:

pto.ldg ... l1cache(uncache)
pto.stg ... l1cache(uncache)

inside the enclosing pto.aicore function.

PTOAS accepts and verifies this IR, even though PTOLdgOp and PTOStgOp
derive from PTO_SimtOp. The VPTO backend then lowers them to
llvm.hivm.ldg.* and llvm.hivm.stg.* calls in the ordinary AICore function.

Bisheng crashes while compiling the generated device LLVM IR.

The same pto.ldg/pto.stg operations work when placed inside a function with
the pto.simt_entry attribute. PTOAS's existing
simt-ldst-policy-core/kernel.pto test compiles successfully.

Reproduction (minimal)

module attributes {
  pto.target_arch = "a5",
  pto.kernel_kind = #pto.kernel_kind<vector>
} {
  func.func @repro_aicore_scalar_ldg(
      %src: !pto.ptr<f32, gm>,
      %dst: !pto.ptr<f32, gm>
  ) attributes {pto.aicore} {
    %c0 = arith.constant 0 : index
    %value = pto.ldg %src[%c0]
        l1cache(uncache) l2cache(nmfv)
        : !pto.ptr<f32, gm> -> f32
    pto.stg %value, %dst[%c0]
        l1cache(uncache) l2cache(nmfv)
        : !pto.ptr<f32, gm>, f32
    return
  }
}


Compile with:


ptoas --pto-arch=a5 --pto-backend=vpto \
  repro_aicore_scalar_ldg.pto \
  -o repro_aicore_scalar_ldg.fatobj.o

Expected behavior

  1. Support scalar GM cache-bypass load/store in a pto.aicore function and
    lower them to instructions valid in that execution context; or
  2. If pto.ldg/pto.stg are only legal inside pto.simt_entry, reject their
    use in other functions during PTO verification and provide a clear
    diagnostic.

For TileLang integration, a dedicated AICore scalar GM bypass operation would
be useful. Replacing these accesses with ordinary pto.load/pto.store would
lose the required data-cache bypass semantics.

Actual behavior / error logs

Error: device LLVM compilation failed
Command: bisheng --cce-aicore-arch=dav-c310-vec ...

*** stack smashing detected ***: terminated
bisheng: error: clang frontend command failed with exit code 134
clang version 15.0.5

Git commit

a742263

Host platform

None

Target Ascend arch (if relevant)

None

PTOAS build level (if relevant)

None

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