[VMI] Lower scalar reduce store to ONEPT without pad-8

[mouliangyu]

Summary

VMI 的 reduce 结果目前无法沿用 CCE 的 ONEPT_B32 scalar store 形态。
虽然前端可以表达 vcadd 后只 store 1 个有效 lane，但 lowering 会先生成
额外的 carrier materialization（如 vdup/vadd）以及普通 masked vsts。
生产 kernel 因此通常采用 pad-8 workaround：将一个 reduce 结果广播到 8 个
lane 后再 store，增加 vector 指令和 UB traffic。

Impact

在 MHC post backward 的小 tile 路径上，pad-8 epilogue 是主要性能差距之一，
当前 kernel-side 对比显示该路径约有 40% 的上板性能影响。独立 reduce microbench
也显示 VMI 的 RVEC span 明显高于 CCE。

Reproducer

Reproducer PR: #1013

The PR contains:

• VMI pad-8 kernel and CCE ONEPT_B32 baseline;
• direct 1-lane VMI form;
• target MI form using dist = "1PT_B32";
• cannsim correctness and RVEC measurements.

Pinned repro version: vmi-v0.1.3.

Expected behavior

For a full reduction whose result is consumed by a 1-lane store, VMI lowering should
preserve the reduce carrier and select the corresponding 1PT_B32 store shape, without
pad-8 broadcast or unnecessary vector materialization.

The fix should preserve the existing VMI source-level semantics; a new scalar-store
API is not required if the existing 1-lane vstore form is sufficient.

Acceptance criteria

• direct 1-lane VMI reduce/store lowers to vsts {dist = "1PT_B32"} or an equivalent
  ONEPT form;
• no pad-8 broadcast is required for this case;
• existing reduce/store correctness tests remain unchanged;
• the reproducer includes an instruction-level comparison against the CCE baseline.

[mouliangyu]

desired_vmi.pto 编不过，需要看一下