Can only access 1023 bytes of vram of size 1024 bytes

[dennowiggle]

Tested with - Standalone Programmer-Debugger D1-mini

When the D1-mini tries to read the last 8 bytes of vram, the first 7 bytes read from this section of the FPGA are correct but the last byte is wrong.

This is due to an incorrect vram size parameter calculation in verilog code "enable_logic.v". The size should be 1024 bytes, but 1023 is set.

Change :
wire [10:0]vram_size = vram_end[config_byte] - vram_start[config_byte];
to
wire [10:0]vram_size = vram_end[config_byte] + 1 - vram_start[config_byte];

With this change, once the FPGA has sent the last byte the address rolls over from 1023 to 0 when the code adds 1 to 1023 (11 bit wide address bus). This additional change is therefore required.

Change line from
else if (vram_address == vram_size)
to
else if ( (vram_address == vram_size) || (vram_address == 0) )