Hi,
I noticed that the Verilog-A function "transition()" is currently not supported by OpenVAF.
In practice, this function is widely used in behavioral modeling to smooth piecewise-constant signals and avoid hard discontinuities in analog equations. This is especially important when modeling digital-like control signals inside analog blocks, where ideal step transitions often lead to convergence issues
Is there any roadmap for implementing it, or a recommended workaround that provides similar numerical behavior?
Thanks for your work on OpenVAF
Hi,
I noticed that the Verilog-A function "transition()" is currently not supported by OpenVAF.
In practice, this function is widely used in behavioral modeling to smooth piecewise-constant signals and avoid hard discontinuities in analog equations. This is especially important when modeling digital-like control signals inside analog blocks, where ideal step transitions often lead to convergence issues
Is there any roadmap for implementing it, or a recommended workaround that provides similar numerical behavior?
Thanks for your work on OpenVAF