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Cart port: side-channel to let cartridges assert /RESET on R3 (RX UART on /IRQ) #942

Description

@woepaul

Problem

On R3/R3A boards the cart port /RESET line is output-only, so cartridges cannot reset the machine. Reset buttons on Final Cartridge, TeensyROM and Idun cartridges do not work; only the MEGA65's own reset button does. Wiring cart /RESET to the mainboard reset button is not sufficient on its own, because the core pulls /RESET low during normal startup and would cause a reset loop.

Use case

The Idun cartridge (https://github.com/idun-project/idun-cartridge — RPi sidecar for C64/C128) alternates between launching native C64 applications and its own shell, which is a terminal client talking to the Pi. The cartridge needs to initiate the reset itself, and the timing of that reset matters, so pressing the machine's reset button is not an equivalent workaround. The author is working on native MEGA65 support.

Proposed solution (from gardners in Discord)

Add an RX UART in the core on /IRQ (or /NMI). A cartridge drives a bit sequence at ~4 MHz; a byte of $72 means "pretend /RESET was pulled low" and $52 releases it. This takes only a couple of 1 MHz cycles. Nothing in existing software drives these lines as a high-speed UART, so compatibility impact should be nil. /DMA would be an alternative but is not connected.

Open questions

Is the 74LS chip fast enough to sample the signalling reliably?
Gate cost on A200T, and whether the feature should be limited to the R3 build.
On the Idun side, connecting pin 12 of the 74LS126 to a spare Pi GPIO would allow the /IRQ line to be driven high as well as low quickly (~4–8 Mbps rather than ~2). Slower signalling would make a byte take longer than an instruction, which risks side effects from reusing /IRQ.
Fallback if this is rejected: an R3 cart adaptor / interposer that disconnects /RESET from the cart port and routes it to the mainboard reset button.

Work to happen on a clean branch from current development. Subject to steerco acceptance once a prototype demonstrates feasibility and gate cost.

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